Commit 4dbd964f authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
Browse files

wifi: rtw89: 8922a: add chip_ops::rfk_hw_init 



Add a chip_ops for WiFi 7 chips to set additional RF configurations
including MLO and PLL settings.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240202030642.108385-12-pkshih@realtek.com
parent 7e2629dc

drivers/net/wireless/realtek/rtw89/core.h

+9 −0
Original line number Diff line number Diff line
@@ -3156,6 +3156,7 @@ struct rtw89_chip_ops { 
	int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map);

	void (*fem_setup)(struct rtw89_dev *rtwdev);

	void (*rfe_gpio)(struct rtw89_dev *rtwdev);

	void (*rfk_hw_init)(struct rtw89_dev *rtwdev);

	void (*rfk_init)(struct rtw89_dev *rtwdev);

	void (*rfk_init_late)(struct rtw89_dev *rtwdev);

	void (*rfk_channel)(struct rtw89_dev *rtwdev);
@@ -5604,6 +5605,14 @@ static inline void rtw89_chip_rfe_gpio(struct rtw89_dev *rtwdev) 
		chip->ops->rfe_gpio(rtwdev);

}



static inline void rtw89_chip_rfk_hw_init(struct rtw89_dev *rtwdev)

{

	const struct rtw89_chip_info *chip = rtwdev->chip;



	if (chip->ops->rfk_hw_init)

		chip->ops->rfk_hw_init(rtwdev);

}



static inline

void rtw89_chip_bb_preinit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)

{

drivers/net/wireless/realtek/rtw89/mac.h

+2 −0
Original line number Diff line number Diff line
@@ -1328,6 +1328,7 @@ enum rtw89_mac_xtal_si_offset { 
#define XTAL_SI_BIG_PWR_CUT	BIT(1)

	XTAL_SI_XTAL_DRV = 0x15,

#define XTAL_SI_DRV_LATCH	BIT(4)

	XTAL_SI_XTAL_PLL = 0x16,

	XTAL_SI_XTAL_XMD_2 = 0x24,

#define XTAL_SI_LDO_LPS		GENMASK(6, 4)

	XTAL_SI_XTAL_XMD_4 = 0x26,
@@ -1361,6 +1362,7 @@ enum rtw89_mac_xtal_si_offset { 
	XTAL_SI_SRAM_CTRL = 0xA1,

#define XTAL_SI_SRAM_DIS	BIT(1)

#define FULL_BIT_MASK		GENMASK(7, 0)

	XTAL_SI_APBT = 0xD1,

	XTAL_SI_PLL = 0xE0,

	XTAL_SI_PLL_1 = 0xE1,

};

drivers/net/wireless/realtek/rtw89/phy.c

+1 −0
Original line number Diff line number Diff line
@@ -5874,6 +5874,7 @@ void rtw89_phy_dm_init(struct rtw89_dev *rtwdev) 
	rtw89_chip_rfe_gpio(rtwdev);

	rtw89_phy_antdiv_set_ant(rtwdev);



	rtw89_chip_rfk_hw_init(rtwdev);

	rtw89_phy_init_rf_nctl(rtwdev);

	rtw89_chip_rfk_init(rtwdev);

	rtw89_chip_set_txpwr_ctrl(rtwdev);

drivers/net/wireless/realtek/rtw89/reg.h

+6 −0
Original line number Diff line number Diff line
@@ -7402,6 +7402,7 @@ 
#define RR_MOD_M_RXBB GENMASK(9, 5)

#define RR_MOD_LO_SEL BIT(1)

#define RR_MODOPT 0x01

#define RR_TXG_SEL GENMASK(19, 17)

#define RR_MODOPT_M_TXPWR GENMASK(5, 0)

#define RR_WLSEL 0x02

#define RR_WLSEL_AG GENMASK(18, 16)
@@ -7594,6 +7595,7 @@ 
#define RR_MIXER_GN GENMASK(4, 3)

#define RR_POW 0xa0

#define RR_POW_SYN GENMASK(3, 2)

#define RR_POW_SYN_V1 GENMASK(3, 0)

#define RR_LOGEN 0xa3

#define RR_LOGEN_RPT GENMASK(19, 16)

#define RR_SX 0xaf
@@ -8734,6 +8736,8 @@ 
#define B_COEF_SEL_IQC BIT(0)

#define B_COEF_SEL_IQC_V1 GENMASK(1, 0)

#define B_COEF_SEL_MDPD BIT(8)

#define B_COEF_SEL_MDPD_V1 GENMASK(9, 8)

#define B_COEF_SEL_EN BIT(31)

#define R_CFIR_SYS 0x8120

#define R_IQK_RES 0x8124

#define B_IQK_RES_K BIT(28)
@@ -8755,8 +8759,10 @@ 
#define B_RFGAIN_BND GENMASK(4, 0)

#define R_CFIR_MAP 0x8150

#define R_CFIR_LUT 0x8154

#define R_CFIR_LUT_C1 0x8254

#define B_CFIR_LUT_SEL BIT(8)

#define B_CFIR_LUT_SET BIT(4)

#define B_CFIR_LUT_G5 BIT(5)

#define B_CFIR_LUT_G3 BIT(3)

#define B_CFIR_LUT_G2 BIT(2)

#define B_CFIR_LUT_GP_V1 GENMASK(2, 0)

drivers/net/wireless/realtek/rtw89/rtw8851b.c

+1 −0
Original line number Diff line number Diff line
@@ -2310,6 +2310,7 @@ static const struct rtw89_chip_ops rtw8851b_chip_ops = { 
	.read_phycap		= rtw8851b_read_phycap,

	.fem_setup		= NULL,

	.rfe_gpio		= rtw8851b_rfe_gpio,

	.rfk_hw_init		= NULL,

	.rfk_init		= rtw8851b_rfk_init,

	.rfk_init_late		= NULL,

	.rfk_channel		= rtw8851b_rfk_channel,