Commit 4e4b1a1b authored by Sonny Jiang's avatar Sonny Jiang Committed by Alex Deucher
Browse files

drm/amdgpu: Add VCN_5_0_1 codec query 



Support VCN_5_0_1 codec query

v2: squash in updates

Signed-off-by: default avatarSonny Jiang <sonjiang@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fdce10ff

drivers/gpu/drm/amd/amdgpu/soc15.c

+24 −0
Original line number Diff line number Diff line
@@ -171,6 +171,24 @@ static const struct amdgpu_video_codecs vcn_4_0_3_video_codecs_encode = { 
	.codec_array = NULL,

};



static const struct amdgpu_video_codecs vcn_5_0_1_video_codecs_encode_vcn0 = {

	.codec_count = 0,

	.codec_array = NULL,

};



static const struct amdgpu_video_codec_info vcn_5_0_1_video_codecs_decode_array_vcn0[] = {

	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},

	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},

	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},

	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},

	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},

};



static const struct amdgpu_video_codecs vcn_5_0_1_video_codecs_decode_vcn0 = {

	.codec_count = ARRAY_SIZE(vcn_5_0_1_video_codecs_decode_array_vcn0),

	.codec_array = vcn_5_0_1_video_codecs_decode_array_vcn0,

};



static int soc15_query_video_codecs(struct amdgpu_device *adev, bool encode,

				    const struct amdgpu_video_codecs **codecs)

{
@@ -209,6 +227,12 @@ static int soc15_query_video_codecs(struct amdgpu_device *adev, bool encode, 
			else

				*codecs = &vcn_4_0_3_video_codecs_decode;

			return 0;

		case IP_VERSION(5, 0, 1):

			if (encode)

				*codecs = &vcn_5_0_1_video_codecs_encode_vcn0;

			else

				*codecs = &vcn_5_0_1_video_codecs_decode_vcn0;

			return 0;

		default:

			return -EINVAL;

		}