Commit 4e5bc50a authored by Michal Wajdeczko's avatar Michal Wajdeczko
Browse files

drm/xe/guc: Use proper flag definitions when registering context 



In H2G action context type is specified in flags dword in bits 2:1.
Use generic FIELD_PREP macro instead of misleading BIT logic.

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250908123025.747-3-michal.wajdeczko@intel.com
parent dd432009

drivers/gpu/drm/xe/xe_guc_fwif.h

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ struct guc_ctxt_registration_info { 
	u32 hwlrca_hi;

};

#define CONTEXT_REGISTRATION_FLAG_KMD	BIT(0)

#define CONTEXT_REGISTRATION_FLAG_TYPE	GENMASK(2, 1)



/* 32-bit KLV structure as used by policy updates and others */

struct guc_klv_generic_dw_t {

drivers/gpu/drm/xe/xe_guc_submit.c

+2 −4
Original line number Diff line number Diff line
@@ -558,10 +558,8 @@ static void register_exec_queue(struct xe_exec_queue *q, int ctx_type) 
	info.engine_submit_mask = q->logical_mask;

	info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));

	info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));

	info.flags = CONTEXT_REGISTRATION_FLAG_KMD;



	if (ctx_type != GUC_CONTEXT_NORMAL)

		info.flags |= BIT(ctx_type);

	info.flags = CONTEXT_REGISTRATION_FLAG_KMD |

		FIELD_PREP(CONTEXT_REGISTRATION_FLAG_TYPE, ctx_type);



	if (xe_exec_queue_is_parallel(q)) {

		u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);