Commit 4e7193ac authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge tag 'thermal-v6.9-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux 

Merge additional thermal control changes for 6.9-rc1 from Daniel Lezcano:

"- Fix memory leak in the error path at probe time in the Mediatek LVTS
   driver (Christophe Jaillet)

 - Fix control buffer enablement regression on Meditek MT7896 (Frank
   Wunderlich)

 - Drop spaces before TABs in different places: thermal-of, ST drivers
   and Makefile (Geert Uytterhoeven)

 - Adjust DT binding for NXP as fsl,tmu-range min/maxItems can vary
   among several SoC versions (Fabio Estevam)

 - Add support for H616 THS controller for the Sun8i platforms. Note
   that this change relies on another change in the SoC specific code
   which is included in this branch (Martin Botka)

 - Don't fail probe due to zone registration failure because there is
   no trip points defined in the DT (Mark Brown)

 - Support variable TMU array size for new platforms (Peng Fan)

 - Adjust the DT binding for thermal-of and make the polling time not
   required and assume it is zero when not found in the DT (Konrad
   Dybcio)

 - Add r8a779h0 support in both the DT and the driver (Geert Uytterhoeven)"

* tag 'thermal-v6.9-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux:
  thermal/drivers/rcar_gen3: Add support for R-Car V4M
  dt-bindings: thermal: rcar-gen3-thermal: Add r8a779h0 support
  thermal/of: Assume polling-delay(-passive) 0 when absent
  dt-bindings: thermal-zones: Don't require polling-delay(-passive)
  thermal/drivers/qoriq: Fix getting tmu range
  thermal/drivers/sun8i: Don't fail probe due to zone registration failure
  thermal/drivers/sun8i: Add support for H616 THS controller
  thermal/drivers/sun8i: Add SRAM register access code
  thermal/drivers/sun8i: Extend H6 calibration to support 4 sensors
  thermal/drivers/sun8i: Explain unknown H6 register value
  dt-bindings: thermal: sun8i: Add H616 THS controller
  soc: sunxi: sram: export register 0 for THS on H616
  dt-bindings: thermal: qoriq-thermal: Adjust fsl,tmu-range min/maxItems
  thermal: Drop spaces before TABs
  thermal/drivers/mediatek: Fix control buffer enablement on MT7896
  thermal/drivers/mediatek/lvts_thermal: Fix a memory leak in an error handling path
parents 259f7d5e 1828c1c1

Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml

+23 −11
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ properties: 
      - allwinner,sun50i-a100-ths

      - allwinner,sun50i-h5-ths

      - allwinner,sun50i-h6-ths

      - allwinner,sun50i-h616-ths



  clocks:

    minItems: 1
@@ -50,6 +51,10 @@ properties: 
  nvmem-cell-names:

    const: calibration



  allwinner,sram:

    maxItems: 1

    description: phandle to device controlling temperate offset SYS_CFG register



  # See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for details

  "#thermal-sensor-cells":

    enum:
@@ -65,6 +70,7 @@ allOf: 
              - allwinner,sun20i-d1-ths

              - allwinner,sun50i-a100-ths

              - allwinner,sun50i-h6-ths

              - allwinner,sun50i-h616-ths



    then:

      properties:
@@ -82,6 +88,17 @@ allOf: 
        clock-names:

          minItems: 2



  - if:

      not:

        properties:

          compatible:

            contains:

              const: allwinner,sun50i-h616-ths



    then:

      properties:

        allwinner,sram: false



  - if:

      properties:

        compatible:
@@ -101,17 +118,12 @@ allOf: 
          const: 1



  - if:

      not:

        properties:

          compatible:

            contains:

              enum:

              - allwinner,sun8i-h3-ths

              - allwinner,sun8i-r40-ths

              - allwinner,sun20i-d1-ths

              - allwinner,sun50i-a64-ths

              - allwinner,sun50i-a100-ths

              - allwinner,sun50i-h5-ths

              - allwinner,sun50i-h6-ths

                - allwinner,sun8i-a83t-ths



    then:

      required:

Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml

+2 −1
Original line number Diff line number Diff line
@@ -33,7 +33,8 @@ properties: 
    description: |

      The values to be programmed into TTRnCR, as specified by the SoC

      reference manual. The first cell is TTR0CR, the second is TTR1CR, etc.

    maxItems: 4

    minItems: 2

    maxItems: 7



  fsl,tmu-calibration:

    $ref: /schemas/types.yaml#/definitions/uint32-matrix

Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml

+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ properties: 
      - renesas,r8a779a0-thermal # R-Car V3U

      - renesas,r8a779f0-thermal # R-Car S4-8

      - renesas,r8a779g0-thermal # R-Car V4H

      - renesas,r8a779h0-thermal # R-Car V4M



  reg: true
@@ -90,6 +91,7 @@ else: 
            enum:

              - renesas,r8a779f0-thermal

              - renesas,r8a779g0-thermal

              - renesas,r8a779h0-thermal

  then:

    required:

      - interrupts

Documentation/devicetree/bindings/thermal/thermal-zones.yaml

+0 −2
Original line number Diff line number Diff line
@@ -228,8 +228,6 @@ patternProperties: 
            additionalProperties: false



    required:

      - polling-delay

      - polling-delay-passive

      - thermal-sensors

      - trips

drivers/soc/sunxi/sunxi_sram.c

+22 −0
Original line number Diff line number Diff line
@@ -287,6 +287,7 @@ EXPORT_SYMBOL(sunxi_sram_release); 
struct sunxi_sramc_variant {

	int num_emac_clocks;

	bool has_ldo_ctrl;

	bool has_ths_offset;

};



static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
@@ -308,8 +309,10 @@ static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { 


static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = {

	.num_emac_clocks = 2,

	.has_ths_offset = true,

};



#define SUNXI_SRAM_THS_OFFSET_REG	0x0

#define SUNXI_SRAM_EMAC_CLOCK_REG	0x30

#define SUNXI_SYS_LDO_CTRL_REG		0x150
@@ -318,6 +321,8 @@ static bool sunxi_sram_regmap_accessible_reg(struct device *dev, 
{

	const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev);



	if (reg == SUNXI_SRAM_THS_OFFSET_REG && variant->has_ths_offset)

		return true;

	if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG &&

	    reg <  SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4)

		return true;
@@ -327,6 +332,20 @@ static bool sunxi_sram_regmap_accessible_reg(struct device *dev, 
	return false;

}



static void sunxi_sram_lock(void *_lock)

{

	spinlock_t *lock = _lock;



	spin_lock(lock);

}



static void sunxi_sram_unlock(void *_lock)

{

	spinlock_t *lock = _lock;



	spin_unlock(lock);

}



static struct regmap_config sunxi_sram_regmap_config = {

	.reg_bits       = 32,

	.val_bits       = 32,
@@ -336,6 +355,9 @@ static struct regmap_config sunxi_sram_regmap_config = { 
	/* other devices have no business accessing other registers */

	.readable_reg	= sunxi_sram_regmap_accessible_reg,

	.writeable_reg	= sunxi_sram_regmap_accessible_reg,

	.lock		= sunxi_sram_lock,

	.unlock		= sunxi_sram_unlock,

	.lock_arg	= &sram_lock,

};



static int __init sunxi_sram_probe(struct platform_device *pdev)