Commit 4e738260 authored by Lewis Huang's avatar Lewis Huang Committed by Alex Deucher
Browse files

drm/amd/display: Only allow dig mapping to pwrseq in new asic

[Why]
The old asic only have 1 pwrseq hw.
We don't need to map the diginst to pwrseq inst in old asic.

[How]
1. Only mapping dig to pwrseq for new asic.
2. Move mapping function into dcn specific panel control component

Cc: Stable <stable@vger.kernel.org> # v6.6+
Cc: Mario Limonciello <mario.limonciello@amd.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3122


Reviewed-by: default avatarAnthony Koo <anthony.koo@amd.com>
Acked-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarLewis Huang <lewis.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 22e1dc4b
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -290,4 +290,5 @@ void dce_panel_cntl_construct(
	dce_panel_cntl->base.funcs = &dce_link_panel_cntl_funcs;
	dce_panel_cntl->base.ctx = init_data->ctx;
	dce_panel_cntl->base.inst = init_data->inst;
	dce_panel_cntl->base.pwrseq_inst = 0;
}
+1 −0
Original line number Diff line number Diff line
@@ -215,4 +215,5 @@ void dcn301_panel_cntl_construct(
	dcn301_panel_cntl->base.funcs = &dcn301_link_panel_cntl_funcs;
	dcn301_panel_cntl->base.ctx = init_data->ctx;
	dcn301_panel_cntl->base.inst = init_data->inst;
	dcn301_panel_cntl->base.pwrseq_inst = 0;
}
+17 −1
Original line number Diff line number Diff line
@@ -154,8 +154,24 @@ void dcn31_panel_cntl_construct(
	struct dcn31_panel_cntl *dcn31_panel_cntl,
	const struct panel_cntl_init_data *init_data)
{
	uint8_t pwrseq_inst = 0xF;

	dcn31_panel_cntl->base.funcs = &dcn31_link_panel_cntl_funcs;
	dcn31_panel_cntl->base.ctx = init_data->ctx;
	dcn31_panel_cntl->base.inst = init_data->inst;
	dcn31_panel_cntl->base.pwrseq_inst = init_data->pwrseq_inst;

	switch (init_data->eng_id) {
	case ENGINE_ID_DIGA:
		pwrseq_inst = 0;
		break;
	case ENGINE_ID_DIGB:
		pwrseq_inst = 1;
		break;
	default:
		DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", init_data->eng_id);
		ASSERT(false);
		break;
	}

	dcn31_panel_cntl->base.pwrseq_inst = pwrseq_inst;
}
+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ struct panel_cntl_funcs {
struct panel_cntl_init_data {
	struct dc_context *ctx;
	uint32_t inst;
	uint32_t pwrseq_inst;
	uint32_t eng_id;
};

struct panel_cntl {
+1 −25
Original line number Diff line number Diff line
@@ -370,30 +370,6 @@ static enum transmitter translate_encoder_to_transmitter(
	}
}

static uint8_t translate_dig_inst_to_pwrseq_inst(struct dc_link *link)
{
	uint8_t pwrseq_inst = 0xF;
	struct dc_context *dc_ctx = link->dc->ctx;

	DC_LOGGER_INIT(dc_ctx->logger);

	switch (link->eng_id) {
	case ENGINE_ID_DIGA:
		pwrseq_inst = 0;
		break;
	case ENGINE_ID_DIGB:
		pwrseq_inst = 1;
		break;
	default:
		DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", link->eng_id);
		ASSERT(false);
		break;
	}

	return pwrseq_inst;
}


static void link_destruct(struct dc_link *link)
{
	int i;
@@ -657,7 +633,7 @@ static bool construct_phy(struct dc_link *link,
			link->link_id.id == CONNECTOR_ID_LVDS)) {
		panel_cntl_init_data.ctx = dc_ctx;
		panel_cntl_init_data.inst = panel_cntl_init_data.ctx->dc_edp_id_count;
		panel_cntl_init_data.pwrseq_inst = translate_dig_inst_to_pwrseq_inst(link);
		panel_cntl_init_data.eng_id = link->eng_id;
		link->panel_cntl =
			link->dc->res_pool->funcs->panel_cntl_create(
								&panel_cntl_init_data);