Commit 4e91f432 authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

Revert "drm/amd/display: Refactor DC update checks"



Revert commit c24bb00c ("drm/amd/display: Refactor DC update checks")

[WHY]
Causing issues with PSR/Replay, reverting until those can be fixed.

Reviewed-by: default avatarMartin Leung <Martin.Leung@amd.com>
Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
Signed-off-by: default avatarChuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 60c741a1
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+3 −3
Original line number Diff line number Diff line
@@ -9890,7 +9890,7 @@ static void amdgpu_dm_enable_self_refresh(struct amdgpu_crtc *acrtc_attach,
	}

	/* Decrement skip count when SR is enabled and we're doing fast updates. */
	if (acrtc_state->update_type <= UPDATE_TYPE_FAST &&
	if (acrtc_state->update_type == UPDATE_TYPE_FAST &&
	    (psr->psr_feature_enabled || pr->config.replay_supported)) {
		if (aconn->sr_skip_count > 0)
			aconn->sr_skip_count--;
@@ -10100,7 +10100,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
		 * fast updates.
		 */
		if (crtc->state->async_flip &&
		    (acrtc_state->update_type > UPDATE_TYPE_FAST ||
		    (acrtc_state->update_type != UPDATE_TYPE_FAST ||
		     get_mem_type(old_plane_state->fb) != get_mem_type(fb)))
			drm_warn_once(state->dev,
				      "[PLANE:%d:%s] async flip with non-fast update\n",
@@ -10108,7 +10108,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,

		bundle->flip_addrs[planes_count].flip_immediate =
			crtc->state->async_flip &&
			acrtc_state->update_type <= UPDATE_TYPE_FAST &&
			acrtc_state->update_type == UPDATE_TYPE_FAST &&
			get_mem_type(old_plane_state->fb) == get_mem_type(fb);

		timestamp_ns = ktime_get_ns();
+1 −1
Original line number Diff line number Diff line
@@ -685,7 +685,7 @@ static int amdgpu_dm_crtc_helper_atomic_check(struct drm_crtc *crtc,
	 * pitch, the DCC state, rotation, etc.
	 */
	if (crtc_state->async_flip &&
	    dm_crtc_state->update_type > UPDATE_TYPE_FAST) {
	    dm_crtc_state->update_type != UPDATE_TYPE_FAST) {
		drm_dbg_atomic(crtc->dev,
			       "[CRTC:%d:%s] async flips are only supported for fast updates\n",
			       crtc->base.id, crtc->name);
+284 −198

File changed.

Preview size limit exceeded, changes collapsed.

+20 −2
Original line number Diff line number Diff line
@@ -467,7 +467,6 @@ struct dc_static_screen_params {
 */

enum surface_update_type {
	UPDATE_TYPE_ADDR_ONLY, /* only surface address is being updated, no other programming needed */
	UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
	UPDATE_TYPE_MED,  /* ISR safe, most of programming needed, no bw/clk change*/
	UPDATE_TYPE_FULL, /* may need to shuffle resources */
@@ -1881,6 +1880,20 @@ struct dc_scaling_info {
	struct scaling_taps scaling_quality;
};

struct dc_fast_update {
	const struct dc_flip_addrs *flip_addr;
	const struct dc_gamma *gamma;
	const struct colorspace_transform *gamut_remap_matrix;
	const struct dc_csc_transform *input_csc_color_matrix;
	const struct fixed31_32 *coeff_reduction_factor;
	struct dc_transfer_func *out_transfer_func;
	struct dc_csc_transform *output_csc_transform;
	const struct dc_csc_transform *cursor_csc_color_matrix;
#if defined(CONFIG_DRM_AMD_DC_DCN4_2)
	struct cm_hist_control *cm_hist_control;
#endif
};

struct dc_surface_update {
	struct dc_plane_state *surface;

@@ -2019,6 +2032,11 @@ bool dc_resource_is_dsc_encoding_supported(const struct dc *dc);
void get_audio_check(struct audio_info *aud_modes,
	struct audio_check *aud_chk);

bool fast_nonaddr_updates_exist(struct dc_fast_update *fast_update, int surface_count);
void populate_fast_updates(struct dc_fast_update *fast_update,
		struct dc_surface_update *srf_updates,
		int surface_count,
		struct dc_stream_update *stream_update);
/*
 * Set up streams and links associated to drive sinks
 * The streams parameter is an absolute set of all active streams.