Commit 4e9b0ac1 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/display: pass struct intel_display to PCH macros 



Now that INTEL_PCH_TYPE() and HAS_PCH_*() macros are under display, and
accept a struct intel_display pointer, use that instead of struct
drm_i915_private pointer in display code.

This is done naively by running:

$ sed -i 's/\(INTEL_PCH_TYPE\|HAS_PCH_[A-Z0-9_-]*\)([^)]*)/\1(display)/g' \
  $(find drivers/gpu/drm/i915/display -name "*.c")

and fixing the fallout, i.e. removing unused local i915 variables and
adding display variables where needed.

v2: Rebase

Reviewed-by: default avatarChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/999f4d7b8ed11739b1c5ec8d6408fc39d5e3776b.1744880985.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 1832fd2b

drivers/gpu/drm/i915/display/g4x_dp.c

+10 −16
Original line number Diff line number Diff line
@@ -59,14 +59,13 @@ static void g4x_dp_set_clock(struct intel_encoder *encoder, 
			     struct intel_crtc_state *pipe_config)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	const struct dpll *divisor = NULL;

	int i, count = 0;



	if (display->platform.g4x) {

		divisor = g4x_dpll;

		count = ARRAY_SIZE(g4x_dpll);

	} else if (HAS_PCH_SPLIT(dev_priv)) {

	} else if (HAS_PCH_SPLIT(display)) {

		divisor = pch_dpll;

		count = ARRAY_SIZE(pch_dpll);

	} else if (display->platform.cherryview) {
@@ -92,7 +91,6 @@ static void intel_dp_prepare(struct intel_encoder *encoder, 
			     const struct intel_crtc_state *pipe_config)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

	enum port port = encoder->port;

	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
@@ -140,7 +138,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder, 
			intel_dp->DP |= DP_ENHANCED_FRAMING;



		intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);

	} else if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {

	} else if (HAS_PCH_CPT(display) && port != PORT_A) {

		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;



		intel_de_rmw(display, TRANS_DP_CTL(crtc->pipe),
@@ -276,7 +274,6 @@ bool g4x_dp_port_enabled(struct intel_display *display, 
			 i915_reg_t dp_reg, enum port port,

			 enum pipe *pipe)

{

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	bool ret;

	u32 val;
@@ -287,7 +284,7 @@ bool g4x_dp_port_enabled(struct intel_display *display, 
	/* asserts want to know the pipe even if the port is disabled */

	if (display->platform.ivybridge && port == PORT_A)

		*pipe = (val & DP_PIPE_SEL_MASK_IVB) >> DP_PIPE_SEL_SHIFT_IVB;

	else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)

	else if (HAS_PCH_CPT(display) && port != PORT_A)

		ret &= cpt_dp_port_selected(display, port, pipe);

	else if (display->platform.cherryview)

		*pipe = (val & DP_PIPE_SEL_MASK_CHV) >> DP_PIPE_SEL_SHIFT_CHV;
@@ -337,7 +334,6 @@ static void intel_dp_get_config(struct intel_encoder *encoder, 
				struct intel_crtc_state *pipe_config)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

	u32 tmp, flags = 0;

	enum port port = encoder->port;
@@ -352,7 +348,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, 


	pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;



	if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {

	if (HAS_PCH_CPT(display) && port != PORT_A) {

		u32 trans_dp = intel_de_read(display,

					     TRANS_DP_CTL(crtc->pipe));
@@ -415,7 +411,6 @@ intel_dp_link_down(struct intel_encoder *encoder, 
		   const struct intel_crtc_state *old_crtc_state)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

	enum port port = encoder->port;
@@ -428,7 +423,7 @@ intel_dp_link_down(struct intel_encoder *encoder, 
	drm_dbg_kms(display->drm, "\n");



	if ((display->platform.ivybridge && port == PORT_A) ||

	    (HAS_PCH_CPT(dev_priv) && port != PORT_A)) {

	    (HAS_PCH_CPT(display) && port != PORT_A)) {

		intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;

		intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;

	} else {
@@ -447,7 +442,7 @@ intel_dp_link_down(struct intel_encoder *encoder, 
	 * to transcoder A after disabling it to allow the

	 * matching HDMI port to be enabled on transcoder A.

	 */

	if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B && port != PORT_A) {

	if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B && port != PORT_A) {

		/*

		 * We get CPU/PCH FIFO underruns on the other pipe when

		 * doing the workaround. Sweep them under the rug.
@@ -1216,10 +1211,10 @@ static int g4x_dp_compute_config(struct intel_encoder *encoder, 
				 struct intel_crtc_state *crtc_state,

				 struct drm_connector_state *conn_state)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	struct intel_display *display = to_intel_display(encoder);

	int ret;



	if (HAS_PCH_SPLIT(i915) && encoder->port != PORT_A)

	if (HAS_PCH_SPLIT(display) && encoder->port != PORT_A)

		crtc_state->has_pch_encoder = true;



	ret = intel_dp_compute_config(encoder, crtc_state, conn_state);
@@ -1272,7 +1267,6 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = { 
bool g4x_dp_init(struct intel_display *display,

		 i915_reg_t output_reg, enum port port)

{

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	const struct intel_bios_encoder_data *devdata;

	struct intel_digital_port *dig_port;

	struct intel_encoder *intel_encoder;
@@ -1346,7 +1340,7 @@ bool g4x_dp_init(struct intel_display *display, 
	intel_encoder->audio_disable = g4x_dp_audio_disable;



	if ((display->platform.ivybridge && port == PORT_A) ||

	    (HAS_PCH_CPT(dev_priv) && port != PORT_A))

	    (HAS_PCH_CPT(display) && port != PORT_A))

		dig_port->dp.set_link_train = cpt_set_link_train;

	else

		dig_port->dp.set_link_train = g4x_set_link_train;
@@ -1363,7 +1357,7 @@ bool g4x_dp_init(struct intel_display *display, 
		intel_encoder->set_signal_levels = g4x_set_signal_levels;



	if (display->platform.valleyview || display->platform.cherryview ||

	    (HAS_PCH_SPLIT(dev_priv) && port != PORT_A)) {

	    (HAS_PCH_SPLIT(display) && port != PORT_A)) {

		dig_port->dp.preemph_max = intel_dp_preemph_max_3;

		dig_port->dp.voltage_max = intel_dp_voltage_max_3;

	} else {

drivers/gpu/drm/i915/display/g4x_hdmi.c

+8 −13
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder, 
			       const struct intel_crtc_state *crtc_state)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);

	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
@@ -36,7 +35,7 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder, 
	intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);



	hdmi_val = SDVO_ENCODING_HDMI;

	if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)

	if (!HAS_PCH_SPLIT(display) && crtc_state->limited_color_range)

		hdmi_val |= HDMI_COLOR_RANGE_16_235;

	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)

		hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH;
@@ -51,7 +50,7 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder, 
	if (crtc_state->has_hdmi_sink)

		hdmi_val |= HDMI_MODE_SELECT_HDMI;



	if (HAS_PCH_CPT(dev_priv))

	if (HAS_PCH_CPT(display))

		hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);

	else if (display->platform.cherryview)

		hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);
@@ -133,9 +132,8 @@ static int g4x_hdmi_compute_config(struct intel_encoder *encoder, 
	struct intel_display *display = to_intel_display(encoder);

	struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);



	if (HAS_PCH_SPLIT(i915)) {

	if (HAS_PCH_SPLIT(display)) {

		crtc_state->has_pch_encoder = true;

		if (!intel_fdi_compute_pipe_bpp(crtc_state))

			return -EINVAL;
@@ -154,7 +152,6 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, 
				  struct intel_crtc_state *pipe_config)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);

	u32 tmp, flags = 0;

	int dotclock;
@@ -185,7 +182,7 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, 
	if (tmp & HDMI_AUDIO_ENABLE)

		pipe_config->has_audio = true;



	if (!HAS_PCH_SPLIT(dev_priv) &&

	if (!HAS_PCH_SPLIT(display) &&

	    tmp & HDMI_COLOR_RANGE_16_235)

		pipe_config->limited_color_range = true;
@@ -382,7 +379,6 @@ static void intel_disable_hdmi(struct intel_atomic_state *state, 
			       const struct drm_connector_state *old_conn_state)

{

	struct intel_display *display = to_intel_display(encoder);

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);

	struct intel_digital_port *dig_port =

		hdmi_to_dig_port(intel_hdmi);
@@ -400,7 +396,7 @@ static void intel_disable_hdmi(struct intel_atomic_state *state, 
	 * to transcoder A after disabling it to allow the

	 * matching DP port to be enabled on transcoder A.

	 */

	if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {

	if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B) {

		/*

		 * We get CPU/PCH FIFO underruns on the other pipe when

		 * doing the workaround. Sweep them under the rug.
@@ -674,7 +670,6 @@ static bool assert_hdmi_port_valid(struct intel_display *display, enum port port 
bool g4x_hdmi_init(struct intel_display *display,

		   i915_reg_t hdmi_reg, enum port port)

{

	struct drm_i915_private *dev_priv = to_i915(display->drm);

	const struct intel_bios_encoder_data *devdata;

	struct intel_digital_port *dig_port;

	struct intel_encoder *intel_encoder;
@@ -716,7 +711,7 @@ bool g4x_hdmi_init(struct intel_display *display, 


	intel_encoder->hotplug = intel_hdmi_hotplug;

	intel_encoder->compute_config = g4x_hdmi_compute_config;

	if (HAS_PCH_SPLIT(dev_priv)) {

	if (HAS_PCH_SPLIT(display)) {

		intel_encoder->disable = pch_disable_hdmi;

		intel_encoder->post_disable = pch_post_disable_hdmi;

	} else {
@@ -737,9 +732,9 @@ bool g4x_hdmi_init(struct intel_display *display, 
		intel_encoder->post_disable = vlv_hdmi_post_disable;

	} else {

		intel_encoder->pre_enable = intel_hdmi_pre_enable;

		if (HAS_PCH_CPT(dev_priv))

		if (HAS_PCH_CPT(display))

			intel_encoder->enable = cpt_enable_hdmi;

		else if (HAS_PCH_IBX(dev_priv))

		else if (HAS_PCH_IBX(display))

			intel_encoder->enable = ibx_enable_hdmi;

		else

			intel_encoder->enable = g4x_enable_hdmi;

drivers/gpu/drm/i915/display/i9xx_wm.c

+1 −3
Original line number Diff line number Diff line
@@ -4143,10 +4143,8 @@ static const struct intel_wm_funcs nop_funcs = { 


void i9xx_wm_init(struct intel_display *display)

{

	struct drm_i915_private *dev_priv = to_i915(display->drm);



	/* For FIFO watermark updates */

	if (HAS_PCH_SPLIT(dev_priv)) {

	if (HAS_PCH_SPLIT(display)) {

		ilk_setup_wm_latency(display);

		display->funcs.wm = &ilk_wm_funcs;

	} else if (display->platform.valleyview || display->platform.cherryview) {

drivers/gpu/drm/i915/display/intel_audio.c

+3 −7
Original line number Diff line number Diff line
@@ -587,19 +587,17 @@ static void ibx_audio_regs_init(struct intel_display *display, 
				enum pipe pipe,

				struct ibx_audio_regs *regs)

{

	struct drm_i915_private *i915 = to_i915(display->drm);



	if (display->platform.valleyview || display->platform.cherryview) {

		regs->hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);

		regs->aud_config = VLV_AUD_CFG(pipe);

		regs->aud_cntl_st = VLV_AUD_CNTL_ST(pipe);

		regs->aud_cntrl_st2 = VLV_AUD_CNTL_ST2;

	} else if (HAS_PCH_CPT(i915)) {

	} else if (HAS_PCH_CPT(display)) {

		regs->hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);

		regs->aud_config = CPT_AUD_CFG(pipe);

		regs->aud_cntl_st = CPT_AUD_CNTL_ST(pipe);

		regs->aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;

	} else if (HAS_PCH_IBX(i915)) {

	} else if (HAS_PCH_IBX(display)) {

		regs->hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID(pipe);

		regs->aud_config = IBX_AUD_CFG(pipe);

		regs->aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
@@ -889,12 +887,10 @@ static const struct intel_audio_funcs hsw_audio_funcs = { 
 */

void intel_audio_hooks_init(struct intel_display *display)

{

	struct drm_i915_private *i915 = to_i915(display->drm);



	if (display->platform.g4x)

		display->funcs.audio = &g4x_audio_funcs;

	else if (display->platform.valleyview || display->platform.cherryview ||

		 HAS_PCH_CPT(i915) || HAS_PCH_IBX(i915))

		 HAS_PCH_CPT(display) || HAS_PCH_IBX(display))

		display->funcs.audio = &ibx_audio_funcs;

	else if (display->platform.haswell || DISPLAY_VER(display) >= 8)

		display->funcs.audio = &hsw_audio_funcs;

drivers/gpu/drm/i915/display/intel_backlight.c

+15 −22
Original line number Diff line number Diff line
@@ -473,7 +473,6 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 
{

	struct intel_connector *connector = to_intel_connector(conn_state->connector);

	struct intel_display *display = to_intel_display(connector);

	struct drm_i915_private *i915 = to_i915(connector->base.dev);

	struct intel_panel *panel = &connector->panel;

	u32 pch_ctl1, pch_ctl2;
@@ -486,7 +485,7 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 
		intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);

	}



	if (HAS_PCH_LPT(i915))

	if (HAS_PCH_LPT(display))

		intel_de_rmw(display, SOUTH_CHICKEN2, LPT_PWM_GRANULARITY,

			     panel->backlight.alternate_pwm_increment ?

			     LPT_PWM_GRANULARITY : 0);
@@ -503,7 +502,7 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 
		pch_ctl1 |= BLM_PCH_POLARITY;



	/* After LPT, override is the default. */

	if (HAS_PCH_LPT(i915))

	if (HAS_PCH_LPT(display))

		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;



	intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);
@@ -1064,7 +1063,7 @@ static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 
 */

static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)

{

	struct drm_i915_private *i915 = to_i915(connector->base.dev);

	struct intel_display *display = to_intel_display(connector);

	struct intel_panel *panel = &connector->panel;

	u32 mul, clock;
@@ -1073,7 +1072,7 @@ static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 
	else

		mul = 128;



	if (HAS_PCH_LPT_H(i915))

	if (HAS_PCH_LPT_H(display))

		clock = MHz(135); /* LPT:H */

	else

		clock = MHz(24); /* LPT:LP */
@@ -1230,12 +1229,11 @@ static u32 get_backlight_min_vbt(struct intel_connector *connector) 
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)

{

	struct intel_display *display = to_intel_display(connector);

	struct drm_i915_private *i915 = to_i915(connector->base.dev);

	struct intel_panel *panel = &connector->panel;

	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;

	bool alt, cpu_mode;



	if (HAS_PCH_LPT(i915))

	if (HAS_PCH_LPT(display))

		alt = intel_de_read(display, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;

	else

		alt = intel_de_read(display, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
@@ -1259,7 +1257,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus 


	panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;



	cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(i915) &&

	cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(display) &&

		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&

		   (cpu_ctl2 & BLM_PWM_ENABLE);
@@ -1466,15 +1464,13 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 


static int cnp_num_backlight_controllers(struct intel_display *display)

{

	struct drm_i915_private *i915 = to_i915(display->drm);



	if (INTEL_PCH_TYPE(i915) >= PCH_MTL)

	if (INTEL_PCH_TYPE(display) >= PCH_MTL)

		return 2;



	if (INTEL_PCH_TYPE(i915) >= PCH_DG1)

	if (INTEL_PCH_TYPE(display) >= PCH_DG1)

		return 1;



	if (INTEL_PCH_TYPE(i915) >= PCH_ICP)

	if (INTEL_PCH_TYPE(display) >= PCH_ICP)

		return 2;



	return 1;
@@ -1482,14 +1478,12 @@ static int cnp_num_backlight_controllers(struct intel_display *display) 


static bool cnp_backlight_controller_is_valid(struct intel_display *display, int controller)

{

	struct drm_i915_private *i915 = to_i915(display->drm);



	if (controller < 0 || controller >= cnp_num_backlight_controllers(display))

		return false;



	if (controller == 1 &&

	    INTEL_PCH_TYPE(i915) >= PCH_ICP &&

	    INTEL_PCH_TYPE(i915) <= PCH_ADP)

	    INTEL_PCH_TYPE(display) >= PCH_ICP &&

	    INTEL_PCH_TYPE(display) <= PCH_ADP)

		return intel_de_read(display, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;



	return true;
@@ -1818,7 +1812,6 @@ void intel_backlight_init_funcs(struct intel_panel *panel) 
	struct intel_connector *connector =

		container_of(panel, struct intel_connector, panel);

	struct intel_display *display = to_intel_display(connector);

	struct drm_i915_private *i915 = to_i915(connector->base.dev);



	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&

	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
@@ -1826,14 +1819,14 @@ void intel_backlight_init_funcs(struct intel_panel *panel) 


	if (display->platform.geminilake || display->platform.broxton) {

		panel->backlight.pwm_funcs = &bxt_pwm_funcs;

	} else if (INTEL_PCH_TYPE(i915) >= PCH_CNP) {

	} else if (INTEL_PCH_TYPE(display) >= PCH_CNP) {

		panel->backlight.pwm_funcs = &cnp_pwm_funcs;

	} else if (INTEL_PCH_TYPE(i915) >= PCH_LPT_H) {

		if (HAS_PCH_LPT(i915))

	} else if (INTEL_PCH_TYPE(display) >= PCH_LPT_H) {

		if (HAS_PCH_LPT(display))

			panel->backlight.pwm_funcs = &lpt_pwm_funcs;

		else

			panel->backlight.pwm_funcs = &spt_pwm_funcs;

	} else if (HAS_PCH_SPLIT(i915)) {

	} else if (HAS_PCH_SPLIT(display)) {

		panel->backlight.pwm_funcs = &pch_pwm_funcs;

	} else if (display->platform.valleyview || display->platform.cherryview) {

		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {