Commit 4ed57f75 authored by Tao Zhang's avatar Tao Zhang Committed by Suzuki K Poulose
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dt-bindings: arm: qcom,coresight-tpdm: Add support for CMB element size



Add property "qcom,cmb-elem-bits" to support CMB(Continuous
Multi-Bit) element for TPDM. The associated aggregator will read
this size before it is enabled. CMB element size currently only
supports 8-bit, 32-bit and 64-bit. Because the existing example
tpdm "tpdm@684c000" which only supports dsb sub-unit, I introduce
a new example "tpdm@6c29000" to describe the usage of this new
property.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarTao Zhang <quic_taozha@quicinc.com>
Signed-off-by: default avatarMao Jinlong <quic_jinlmao@quicinc.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1707024641-22460-4-git-send-email-quic_taozha@quicinc.com
parent f021801c
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+25 −0
Original line number Diff line number Diff line
@@ -52,6 +52,14 @@ properties:
    $ref: /schemas/types.yaml#/definitions/uint8
    enum: [32, 64]

  qcom,cmb-element-bits:
    description:
      Specifies the CMB(Continuous Multi-Bit) element size supported by
      the monitor. The associated aggregator will read this size before it
      is enabled. CMB element size currently only supports 8-bit, 32-bit
      and 64-bit.
    enum: [8, 32, 64]

  qcom,dsb-msrs-num:
    description:
      Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
@@ -110,4 +118,21 @@ examples:
      };
    };

    tpdm@6c29000 {
      compatible = "qcom,coresight-tpdm", "arm,primecell";
      reg = <0x06c29000 0x1000>;

      qcom,cmb-element-bits = <64>;

      clocks = <&aoss_qmp>;
      clock-names = "apb_pclk";

      out-ports {
        port {
          tpdm_ipcc_out_funnel_center: endpoint {
            remote-endpoint = <&funnel_center_in_tpdm_ipcc>;
          };
        };
      };
    };
...