Commit 4f317863 authored by Yinjie Yao's avatar Yinjie Yao Committed by Alex Deucher
Browse files

drm/amdgpu/vcn: set no_user_fence for VCN v2.5 enc/dec rings 



VCN encoder and decoder rings do not support 64-bit user fence writes,
reject CS submissions with user fences.

Fixes: 28c17d72 ("drm/amdgpu: add VCN2.5 basic supports")
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarYinjie Yao <yinjie.yao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit efc9dd5590894109bce9a0bfe1fa5592dd6b20b1)
parent 8d80b293

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

+2 −0
Original line number Diff line number Diff line
@@ -1778,6 +1778,7 @@ static void vcn_v2_5_dec_ring_set_wptr(struct amdgpu_ring *ring) 
static const struct amdgpu_ring_funcs vcn_v2_5_dec_ring_vm_funcs = {

	.type = AMDGPU_RING_TYPE_VCN_DEC,

	.align_mask = 0xf,

	.no_user_fence = true,

	.secure_submission_supported = true,

	.get_rptr = vcn_v2_5_dec_ring_get_rptr,

	.get_wptr = vcn_v2_5_dec_ring_get_wptr,
@@ -1879,6 +1880,7 @@ static const struct amdgpu_ring_funcs vcn_v2_5_enc_ring_vm_funcs = { 
	.type = AMDGPU_RING_TYPE_VCN_ENC,

	.align_mask = 0x3f,

	.nop = VCN_ENC_CMD_NO_OP,

	.no_user_fence = true,

	.get_rptr = vcn_v2_5_enc_ring_get_rptr,

	.get_wptr = vcn_v2_5_enc_ring_get_wptr,

	.set_wptr = vcn_v2_5_enc_ring_set_wptr,