Commit 4f460bff authored Jun 25, 2024 by Perry Yuan Committed by Mario Limonciello Jun 26, 2024

cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h



There are some other drivers also need to use the
MSR_K7_HWCR_CPB_DIS_BIT for CPB control bit, so it makes sense to move
the definition to a common header file to allow other driver to use it.

No intentional functional impact.

Suggested-by: Gautham Ranjal Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Acked-by: Rafael J. Wysocki <rafael@kernel.org>
Acked-by: Huang Rui <ray.huang@amd.com>
Link: https://lore.kernel.org/r/78b6c75e6cffddce3e950dd543af6ae9f8eeccc3.1718988436.git.perry.yuan@amd.com
Link: https://lore.kernel.org/r/20240626042733.3747-2-mario.limonciello@amd.com


Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>

parent 2240d3e6

arch/x86/include/asm/msr-index.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -781,6 +781,8 @@
		#define MSR_K7_HWCR_IRPERF_EN BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)
		#define MSR_K7_FID_VID_CTL 0xc0010041
		#define MSR_K7_FID_VID_STATUS 0xc0010042
		#define MSR_K7_HWCR_CPB_DIS_BIT 25
		#define MSR_K7_HWCR_CPB_DIS BIT_ULL(MSR_K7_HWCR_CPB_DIS_BIT)

		/* K6 MSRs */
		#define MSR_K6_WHCR 0xc0000082

drivers/cpufreq/acpi-cpufreq.c

+0 −2

Original line number	Diff line number	Diff line
		@@ -50,8 +50,6 @@ enum {
		#define AMD_MSR_RANGE (0x7)
		#define HYGON_MSR_RANGE (0x7)

		#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)

		struct acpi_cpufreq_data {
		unsigned int resume;
		unsigned int cpu_feature;