Commit 4f4bdbda authored by Michał Winiarski's avatar Michał Winiarski
Browse files

drm/xe: Add sa/guc_buf_cache sync interface 



In upcoming changes the cached buffers are going to be used to read data
produced by the GuC. Add a counterpart to flush, which synchronizes the
CPU-side of suballocation with the GPU data and propagate the interface
to GuC Buffer Cache.

Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patch.msgid.link/20251112132220.516975-11-michal.winiarski@intel.com


Signed-off-by: default avatarMichał Winiarski <michal.winiarski@intel.com>
parent 20cfef3a

drivers/gpu/drm/xe/xe_guc_buf.c

+13 −0
Original line number Diff line number Diff line
@@ -115,6 +115,19 @@ void xe_guc_buf_release(const struct xe_guc_buf buf) 
		xe_sa_bo_free(buf.sa, NULL);

}



/**

 * xe_guc_buf_sync_read() - Copy the data from the GPU memory to the sub-allocation.

 * @buf: the &xe_guc_buf to sync

 *

 * Return: a CPU pointer of the sub-allocation.

 */

void *xe_guc_buf_sync_read(const struct xe_guc_buf buf)

{

	xe_sa_bo_sync_read(buf.sa);



	return xe_sa_bo_cpu_addr(buf.sa);

}



/**

 * xe_guc_buf_flush() - Copy the data from the sub-allocation to the GPU memory.

 * @buf: the &xe_guc_buf to flush

drivers/gpu/drm/xe/xe_guc_buf.h

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ static inline bool xe_guc_buf_is_valid(const struct xe_guc_buf buf) 
}



void *xe_guc_buf_cpu_ptr(const struct xe_guc_buf buf);

void *xe_guc_buf_sync_read(const struct xe_guc_buf buf);

u64 xe_guc_buf_flush(const struct xe_guc_buf buf);

u64 xe_guc_buf_gpu_addr(const struct xe_guc_buf buf);

u64 xe_guc_cache_gpu_addr_from_ptr(struct xe_guc_buf_cache *cache, const void *ptr, u32 size);

drivers/gpu/drm/xe/xe_sa.c

+21 −0
Original line number Diff line number Diff line
@@ -110,6 +110,10 @@ struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size, 
	return drm_suballoc_new(&sa_manager->base, size, gfp, true, 0);

}



/**

 * xe_sa_bo_flush_write() - Copy the data from the sub-allocation to the GPU memory.

 * @sa_bo: the &drm_suballoc to flush

 */

void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo)

{

	struct xe_sa_manager *sa_manager = to_xe_sa_manager(sa_bo->manager);
@@ -123,6 +127,23 @@ void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo) 
			 drm_suballoc_size(sa_bo));

}



/**

 * xe_sa_bo_sync_read() - Copy the data from GPU memory to the sub-allocation.

 * @sa_bo: the &drm_suballoc to sync

 */

void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo)

{

	struct xe_sa_manager *sa_manager = to_xe_sa_manager(sa_bo->manager);

	struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);



	if (!sa_manager->bo->vmap.is_iomem)

		return;



	xe_map_memcpy_from(xe, xe_sa_bo_cpu_addr(sa_bo), &sa_manager->bo->vmap,

			   drm_suballoc_soffset(sa_bo),

			   drm_suballoc_size(sa_bo));

}



void xe_sa_bo_free(struct drm_suballoc *sa_bo,

		   struct dma_fence *fence)

{

drivers/gpu/drm/xe/xe_sa.h

+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager 
}



void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);

void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo);

void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence);



static inline struct xe_sa_manager *