Commit 4ff4ac1b authored by Barry Scott's avatar Barry Scott Committed by Linus Torvalds
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[PATCH] dvb: frontend: mt352: fix signal strength reading



Fix two problems with the signal strength value in the mt352.c frontend:
1. the 4 most significant bits are zeroed - shift and mask wrong way round
2. need to align the 12 bits from the registers at the top of the 16 bit
   returned value - otherwise the range is not 0 to 0xffff its 0xf000 to 0xffff

Signed-off-by: default avatarBarry Scott <barry.scott@onelan.co.uk>
Signed-off-by: default avatarJohannes Stezenbach <js@linuxtv.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 50b447d5
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+4 −2
Original line number Diff line number Diff line
@@ -462,9 +462,11 @@ static int mt352_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct mt352_state* state = fe->demodulator_priv;

	u16 signal = ((mt352_read_register(state, AGC_GAIN_1) << 8) & 0x0f) |
		      (mt352_read_register(state, AGC_GAIN_0));
	/* align the 12 bit AGC gain with the most significant bits */
	u16 signal = ((mt352_read_register(state, AGC_GAIN_1) & 0x0f) << 12) |
		(mt352_read_register(state, AGC_GAIN_0) << 4);

	/* inverse of gain is signal strength */
	*strength = ~signal;
	return 0;
}