Loading drivers/clocksource/sh_mtu2.c +3 −3 Original line number Diff line number Diff line Loading @@ -43,7 +43,7 @@ struct sh_mtu2_priv { struct clock_event_device ced; }; static DEFINE_SPINLOCK(sh_mtu2_lock); static DEFINE_RAW_SPINLOCK(sh_mtu2_lock); #define TSTR -1 /* shared register */ #define TCR 0 /* channel register */ Loading Loading @@ -107,7 +107,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start) unsigned long flags, value; /* start stop register shared by multiple timer channels */ spin_lock_irqsave(&sh_mtu2_lock, flags); raw_spin_lock_irqsave(&sh_mtu2_lock, flags); value = sh_mtu2_read(p, TSTR); if (start) Loading @@ -116,7 +116,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start) value &= ~(1 << cfg->timer_bit); sh_mtu2_write(p, TSTR, value); spin_unlock_irqrestore(&sh_mtu2_lock, flags); raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags); } static int sh_mtu2_enable(struct sh_mtu2_priv *p) Loading Loading
drivers/clocksource/sh_mtu2.c +3 −3 Original line number Diff line number Diff line Loading @@ -43,7 +43,7 @@ struct sh_mtu2_priv { struct clock_event_device ced; }; static DEFINE_SPINLOCK(sh_mtu2_lock); static DEFINE_RAW_SPINLOCK(sh_mtu2_lock); #define TSTR -1 /* shared register */ #define TCR 0 /* channel register */ Loading Loading @@ -107,7 +107,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start) unsigned long flags, value; /* start stop register shared by multiple timer channels */ spin_lock_irqsave(&sh_mtu2_lock, flags); raw_spin_lock_irqsave(&sh_mtu2_lock, flags); value = sh_mtu2_read(p, TSTR); if (start) Loading @@ -116,7 +116,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start) value &= ~(1 << cfg->timer_bit); sh_mtu2_write(p, TSTR, value); spin_unlock_irqrestore(&sh_mtu2_lock, flags); raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags); } static int sh_mtu2_enable(struct sh_mtu2_priv *p) Loading