Unverified Commit 505596c8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.16-next-dts64' of... 

Merge tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt8183:
- add Acer Chromebook 314
- evb: add node to read thermisor from AUXIN0
- add several sku's for Lenovo IdeaPad Flex 3 Chromebook and ASUS Chromebook Detachable CM3
- update sensor mapping of the board temperature sensor
- add some coresight nodes for CPU debugging
- USB Type C connector description to all Chromebooks

mt8192, mt8516:
- smaller i2c related fixes

mt8173:
- enable backlight enable pin to all Chromebooks

mt7986[a,b]:
- add basic support

* tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
  arm64: dts: mediatek: add pinctrl support for mt7986b
  arm64: dts: mediatek: add pinctrl support for mt7986a
  arm64: dts: mt8183: kukui: Add Type C node
  arm64: dts: mediatek: add basic mt7986 support
  dt-bindings: arm64: dts: mediatek: Add mt7986 series
  arm64: dts: mt8183: support coresight-cpu-debug for mt8183
  arm64: dts: mediatek: mt8173-elm: Add backlight enable pin config
  arm64: dts: mediatek: mt8173-elm: Move pwm pinctrl to pwm0 node
  arm64: dts: mt8183-kukui: Update Tboard sensor mapping table
  arm64: dts: mediatek: mt8173: Add gce-client-reg to display od/ufo
  dt-bindings: arm64: dts: mediatek: Add sku22 for mt8183 kakadu board
  dt-bindings: arm64: dts: mediatek: Add more SKUs for mt8183 fennel board
  dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-cozmo
  arm64: dts: mt8183: Add kakadu sku22
  arm64: dts: mt8183: Add more fennel SKUs
  arm64: dts: mt8183: Add kukui-jacuzzi-cozmo board
  arm64: dts: mt8183: jacuzzi: remove unused ddc-i2c-bus
  arm64: dts: mediatek: mt8183-evb: Add node for thermistor
  arm64: dts: mediatek: mt8516: remove 2 invalid i2c clocks
  arm64: dts: mediatek: mt8192: fix i2c node names
  ...

Link: https://lore.kernel.org/r/0d05e8b6-c56f-bad7-00c1-44682cedb38f@suse.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 33f8b486 f40c0f80

Documentation/devicetree/bindings/arm/mediatek.yaml

+20 −0
Original line number Diff line number Diff line
@@ -77,6 +77,14 @@ properties: 
          - enum:

              - mediatek,mt7629-rfb

          - const: mediatek,mt7629

      - items:

          - enum:

              - mediatek,mt7986a-rfb

          - const: mediatek,mt7986a

      - items:

          - enum:

              - mediatek,mt7986b-rfb

          - const: mediatek,mt7986b

      - items:

          - enum:

              - mediatek,mt8127-moose
@@ -134,6 +142,10 @@ properties: 
              - google,krane-sku176

          - const: google,krane

          - const: mediatek,mt8183

      - description: Google Cozmo (Acer Chromebook 314)

        items:

          - const: google,cozmo

          - const: mediatek,mt8183

      - description: Google Damu (ASUS Chromebook Flip CM3)

        items:

          - const: google,damu
@@ -143,7 +155,9 @@ properties: 
          - enum:

              - google,fennel-sku0

              - google,fennel-sku1

              - google,fennel-sku2

              - google,fennel-sku6

              - google,fennel-sku7

          - const: google,fennel

          - const: mediatek,mt8183

      - description: Google Juniper (Acer Chromebook Spin 311) / Kenzo (Acer Chromebook 311)
@@ -159,6 +173,12 @@ properties: 
          - const: google,kakadu-rev2

          - const: google,kakadu

          - const: mediatek,mt8183

      - description: Google Kakadu (ASUS Chromebook Detachable CM3)

        items:

          - const: google,kakadu-rev3-sku22

          - const: google,kakadu-rev2-sku22

          - const: google,kakadu

          - const: mediatek,mt8183

      - description: Google Kappa (HP Chromebook 11a)

        items:

          - const: google,kappa

arch/arm64/boot/dts/mediatek/Makefile

+6 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb 
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
@@ -14,16 +16,20 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb 
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-cozmo.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel-sku1.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel-sku6.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel-sku7.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14-sku2.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu-sku22.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb

dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb

arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts

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+57 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (C) 2021 MediaTek Inc.

 * Author: Sam.Shih <sam.shih@mediatek.com>

 */



/dts-v1/;

#include "mt7986a.dtsi"



/ {

	model = "MediaTek MT7986a RFB";

	compatible = "mediatek,mt7986a-rfb";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory {

		reg = <0 0x40000000 0 0x40000000>;

	};

};



&uart0 {

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart1_pins>;

	status = "okay";

};



&uart2 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart2_pins>;

	status = "okay";

};



&pio {

	uart1_pins: uart1-pins {

		mux {

			function = "uart";

			groups = "uart1";

		};

	};



	uart2_pins: uart2-pins {

		mux {

			function = "uart";

			groups = "uart2";

		};

	};

};

arch/arm64/boot/dts/mediatek/mt7986a.dtsi

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+169 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (C) 2021 MediaTek Inc.

 * Author: Sam.Shih <sam.shih@mediatek.com>

 */



#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	interrupt-parent = <&gic>;

	#address-cells = <2>;

	#size-cells = <2>;



	system_clk: dummy40m {

		compatible = "fixed-clock";

		clock-frequency = <40000000>;

		#clock-cells = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x0>;

			#cooling-cells = <2>;

		};



		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x1>;

			#cooling-cells = <2>;

		};



		cpu2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x2>;

			#cooling-cells = <2>;

		};



		cpu3: cpu@3 {

			device_type = "cpu";

			enable-method = "psci";

			compatible = "arm,cortex-a53";

			reg = <0x3>;

			#cooling-cells = <2>;

		};

	};



	psci {

		compatible  = "arm,psci-0.2";

		method      = "smc";

	};



	reserved-memory {

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */

		secmon_reserved: secmon@43000000 {

			reg = <0 0x43000000 0 0x30000>;

			no-map;

		};

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupt-parent = <&gic>;

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;

	};



	soc {

		#address-cells = <2>;

		#size-cells = <2>;

		compatible = "simple-bus";

		ranges;



		gic: interrupt-controller@c000000 {

			compatible = "arm,gic-v3";

			#interrupt-cells = <3>;

			interrupt-parent = <&gic>;

			interrupt-controller;

			reg = <0 0x0c000000 0 0x10000>,  /* GICD */

			      <0 0x0c080000 0 0x80000>,  /* GICR */

			      <0 0x0c400000 0 0x2000>,   /* GICC */

			      <0 0x0c410000 0 0x1000>,   /* GICH */

			      <0 0x0c420000 0 0x2000>;   /* GICV */

			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		};



		watchdog: watchdog@1001c000 {

			compatible = "mediatek,mt7986-wdt",

				     "mediatek,mt6589-wdt";

			reg = <0 0x1001c000 0 0x1000>;

			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;

			#reset-cells = <1>;

			status = "disabled";

		};



		pio: pinctrl@1001f000 {

			compatible = "mediatek,mt7986a-pinctrl";

			reg = <0 0x1001f000 0 0x1000>,

			      <0 0x11c30000 0 0x1000>,

			      <0 0x11c40000 0 0x1000>,

			      <0 0x11e20000 0 0x1000>,

			      <0 0x11e30000 0 0x1000>,

			      <0 0x11f00000 0 0x1000>,

			      <0 0x11f10000 0 0x1000>,

			      <0 0x1000b000 0 0x1000>;

			reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",

				    "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pio 0 0 100>;

			interrupt-controller;

			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-parent = <&gic>;

			#interrupt-cells = <2>;

		};



		trng: trng@1020f000 {

			compatible = "mediatek,mt7986-rng",

				     "mediatek,mt7623-rng";

			reg = <0 0x1020f000 0 0x100>;

			clocks = <&system_clk>;

			clock-names = "rng";

			status = "disabled";

		};



		uart0: serial@11002000 {

			compatible = "mediatek,mt7986-uart",

				     "mediatek,mt6577-uart";

			reg = <0 0x11002000 0 0x400>;

			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&system_clk>;

			status = "disabled";

		};



		uart1: serial@11003000 {

			compatible = "mediatek,mt7986-uart",

				     "mediatek,mt6577-uart";

			reg = <0 0x11003000 0 0x400>;

			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&system_clk>;

			status = "disabled";

		};



		uart2: serial@11004000 {

			compatible = "mediatek,mt7986-uart",

				     "mediatek,mt6577-uart";

			reg = <0 0x11004000 0 0x400>;

			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&system_clk>;

			status = "disabled";

		};



	};



};

arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts

0 → 100644
+29 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (C) 2021 MediaTek Inc.

 * Author: Sam.Shih <sam.shih@mediatek.com>

 */



/dts-v1/;

#include "mt7986b.dtsi"



/ {

	model = "MediaTek MT7986b RFB";

	compatible = "mediatek,mt7986b-rfb";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory {

		reg = <0 0x40000000 0 0x40000000>;

	};

};



&uart0 {

	status = "okay";

};