Commit 5056c596 authored by Huacai Chen's avatar Huacai Chen
Browse files

LoongArch/smp: Call rcutree_report_cpu_starting() at tlb_init() 



Machines which have more than 8 nodes fail to boot SMP after commit
a2ccf463 ("LoongArch/smp: Call rcutree_report_cpu_starting()
earlier"). Because such machines use tlb-based per-cpu base address
rather than dmw-based per-cpu base address, resulting per-cpu variables
can only be accessed after tlb_init(). But rcutree_report_cpu_starting()
is now called before tlb_init() and accesses per-cpu variables indeed.

Since the original patch want to avoid the lockdep warning caused by
page allocation in tlb_init(), we can move rcutree_report_cpu_starting()
to tlb_init() where after tlb exception configuration but before page
allocation.

Fixes: a2ccf463 ("LoongArch/smp: Call rcutree_report_cpu_starting() earlier")
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 6613476e

arch/loongarch/kernel/smp.c

+0 −1
Original line number Diff line number Diff line
@@ -509,7 +509,6 @@ asmlinkage void start_secondary(void) 
	sync_counter();

	cpu = raw_smp_processor_id();

	set_my_cpu_offset(per_cpu_offset(cpu));

	rcutree_report_cpu_starting(cpu);



	cpu_probe();

	constant_clockevent_init();

arch/loongarch/mm/tlb.c

+10 −6
Original line number Diff line number Diff line
@@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu) 
		set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);

		set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);

		set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);

	}

	} else {

		int vec_sz __maybe_unused;

		void *addr __maybe_unused;

		struct page *page __maybe_unused;



		/* Avoid lockdep warning */

		rcutree_report_cpu_starting(cpu);



#ifdef CONFIG_NUMA

	else {

		void *addr;

		struct page *page;

		const int vec_sz = sizeof(exception_handlers);

		vec_sz = sizeof(exception_handlers);



		if (pcpu_handlers[cpu])

			return;
@@ -305,9 +309,9 @@ static void setup_tlb_handler(int cpu) 
		csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);

		csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);

		csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);

	}

#endif

	}

}



void tlb_init(int cpu)

{