Commit 50aecccc authored by Chevron Li's avatar Chevron Li Committed by Ulf Hansson
Browse files

mmc: sdhci-pci-o2micro: fix some SD cards compatibility issue at DDR50 mode 



Bayhub chips have better compatibility support for SDR50 than DDR50
and both mode have the same R/W performance when clock frequency >= 100MHz.
Disable DDR50 mode and use SDR50 instead.

Signed-off-by: default avatarChevron Li <chevron.li@bayhubtech.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220729100524.387-1-chevron.li@bayhubtech.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 52483609

drivers/mmc/host/sdhci-pci-o2micro.c

+5 −2
Original line number Diff line number Diff line
@@ -317,11 +317,12 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) 
	u32 reg_val;



	/*

	 * This handler only implements the eMMC tuning that is specific to

	 * This handler implements the hardware tuning that is specific to

	 * this controller.  Fall back to the standard method for other TIMING.

	 */

	if ((host->timing != MMC_TIMING_MMC_HS200) &&

		(host->timing != MMC_TIMING_UHS_SDR104))

		(host->timing != MMC_TIMING_UHS_SDR104) &&

		(host->timing != MMC_TIMING_UHS_SDR50))

		return sdhci_execute_tuning(mmc, opcode);



	if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
@@ -631,6 +632,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) 
		if (reg & 0x1)

			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;



		host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50;



		sdhci_pci_o2_enable_msi(chip, host);



		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {