Commit 50c82997 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Andi Shyti
Browse files

drm/i915: Introduce RING_FAULT_VADDR_MASK 



Add a proper bitmask definition for the pre-bdw fault
virtual address bits insted of abusing PAGE_MASK.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-6-ville.syrjala@linux.intel.com
parent 66ec4c1a

drivers/gpu/drm/i915/gt/intel_gt.c

+5 −3
Original line number Diff line number Diff line
@@ -302,17 +302,19 @@ static void gen6_check_faults(struct intel_gt *gt) 
{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;

	unsigned long fault;



	for_each_engine(engine, gt, id) {

		u32 fault;



		fault = GEN6_RING_FAULT_REG_READ(engine);



		if (fault & RING_FAULT_VALID) {

			gt_dbg(gt, "Unexpected fault\n"

			       "\tAddr: 0x%08lx\n"

			       "\tAddr: 0x%08x\n"

			       "\tAddress space: %s\n"

			       "\tSource ID: %d\n"

			       "\tType: %d\n",

			       fault & PAGE_MASK,

			       fault & RING_FAULT_VADDR_MASK,

			       fault & RING_FAULT_GTTSEL_MASK ?

			       "GGTT" : "PPGTT",

			       REG_FIELD_GET(RING_FAULT_SRCID_MASK, fault),

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -326,6 +326,7 @@ 
							    _RING_FAULT_REG_VCS, \

							    _RING_FAULT_REG_VECS, \

							    _RING_FAULT_REG_BCS))

#define   RING_FAULT_VADDR_MASK			REG_GENMASK(31, 12) /* pre-bdw */

#define   RING_FAULT_ENGINE_ID_MASK		REG_GENMASK(16, 12) /* bdw+ */

#define   RING_FAULT_GTTSEL_MASK		REG_BIT(11) /* pre-bdw */

#define   RING_FAULT_SRCID_MASK			REG_GENMASK(10, 3)