Commit 50e7cce8 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Limit clearing of ID_{AA64PFR0,PFR1}_EL1.GIC to userspace irqchip 



Now that the idreg's GIC field is in sync with the irqchip, limit
the runtime clearing of these fields to the pathological case where
we do not have an in-kernel GIC.

While we're at it, use the existing API instead of open-coded
accessors to access the ID regs.

Fixes: 5cb57a1a ("KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest")
Reviewed-by: default avatarOliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/20251030122707.2033690-4-maz@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 8a9866ff

arch/arm64/kvm/sys_regs.c

+7 −5
Original line number Diff line number Diff line
@@ -5609,11 +5609,13 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu) 


	guard(mutex)(&kvm->arch.config_lock);



	if (!(static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) &&

	      irqchip_in_kernel(kvm) &&

	      kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)) {

		kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] &= ~ID_AA64PFR0_EL1_GIC_MASK;

		kvm->arch.id_regs[IDREG_IDX(SYS_ID_PFR1_EL1)] &= ~ID_PFR1_EL1_GIC_MASK;

	if (!irqchip_in_kernel(kvm)) {

		u64 val;



		val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;

		kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1, val);

		val = kvm_read_vm_id_reg(kvm, SYS_ID_PFR1_EL1) & ~ID_PFR1_EL1_GIC;

		kvm_set_vm_id_reg(kvm, SYS_ID_PFR1_EL1, val);

	}



	if (vcpu_has_nv(vcpu)) {