Commit 5129aa62 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Martin K. Petersen
Browse files

scsi: ufs: renesas: Add register read to remove save/set/restore 



Add support for returning read register values from
ufs_renesas_reg_control(), so ufs_renesas_set_phy() can use the existing
ufs_renesas_write_phy() helper.  Remove the now unused code to save to,
set, and restore from a static array inside ufs_renesas_reg_control().

Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9fa240a9dc0308d6675138f8434eccb77f051650.1741179611.git.geert+renesas@glider.be


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent c4e83573

drivers/ufs/host/ufs-renesas.c

+23 −76
Original line number Diff line number Diff line
@@ -23,18 +23,9 @@ struct ufs_renesas_priv { 
	bool initialized;	/* The hardware needs initialization once */

};



enum {

	SET_PHY_INDEX_LO = 0,

	SET_PHY_INDEX_HI,

	TIMER_INDEX,

	MAX_INDEX

};



enum ufs_renesas_init_param_mode {

	MODE_RESTORE,

	MODE_SET,

	MODE_SAVE,

	MODE_POLL,

	MODE_READ,

	MODE_WAIT,

	MODE_WRITE,

};
@@ -45,7 +36,6 @@ struct ufs_renesas_init_param { 
	union {

		u32 expected;

		u32 delay_us;

		u32 set;

		u32 val;

	} u;

	u32 mask;
@@ -57,25 +47,13 @@ static void ufs_renesas_dbg_register_dump(struct ufs_hba *hba) 
	ufshcd_dump_regs(hba, 0xc0, 0x40, "regs: 0xc0 + ");

}



static void ufs_renesas_reg_control(struct ufs_hba *hba,

static u32 ufs_renesas_reg_control(struct ufs_hba *hba,

				   const struct ufs_renesas_init_param *p)

{

	static u32 save[MAX_INDEX];

	u32 val = 0;

	int ret;

	u32 val;



	WARN_ON(p->index >= MAX_INDEX);



	switch (p->mode) {

	case MODE_RESTORE:

		ufshcd_writel(hba, save[p->index], p->reg);

		break;

	case MODE_SET:

		save[p->index] |= p->u.set;

		break;

	case MODE_SAVE:

		save[p->index] = ufshcd_readl(hba, p->reg) & p->mask;

		break;

	case MODE_POLL:

		ret = readl_poll_timeout_atomic(hba->mmio_base + p->reg,

						val,
@@ -85,6 +63,9 @@ static void ufs_renesas_reg_control(struct ufs_hba *hba, 
			dev_err(hba->dev, "%s: poll failed %d (%08x, %08x, %08x)\n",

				__func__, ret, val, p->mask, p->u.expected);

		break;

	case MODE_READ:

		val = ufshcd_readl(hba, p->reg);

		break;

	case MODE_WAIT:

		if (p->u.delay_us > 1000)

			mdelay(DIV_ROUND_UP(p->u.delay_us, 1000));
@@ -97,6 +78,8 @@ static void ufs_renesas_reg_control(struct ufs_hba *hba, 
	default:

		break;

	}



	return val;

}



static void ufs_renesas_poll(struct ufs_hba *hba, u32 reg, u32 expected, u32 mask)
@@ -111,38 +94,14 @@ static void ufs_renesas_poll(struct ufs_hba *hba, u32 reg, u32 expected, u32 mas 
	ufs_renesas_reg_control(hba, &param);

}



static void ufs_renesas_restore(struct ufs_hba *hba, u32 reg, u32 index)

static u32 ufs_renesas_read(struct ufs_hba *hba, u32 reg)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_RESTORE,

		.mode = MODE_READ,

		.reg = reg,

		.index = index,

	};



	ufs_renesas_reg_control(hba, &param);

}



static void ufs_renesas_save(struct ufs_hba *hba, u32 reg, u32 mask, u32 index)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_SAVE,

		.reg = reg,

		.mask = mask,

		.index = index,

	};



	ufs_renesas_reg_control(hba, &param);

}



static void ufs_renesas_set(struct ufs_hba *hba, u32 index, u32 set)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_SAVE,

		.index = index,

		.u.set = set,

	};



	ufs_renesas_reg_control(hba, &param);

	return ufs_renesas_reg_control(hba, &param);

}



static void ufs_renesas_wait(struct ufs_hba *hba, u32 delay_us)
@@ -181,15 +140,6 @@ static void ufs_renesas_write_800_80c_poll(struct ufs_hba *hba, u32 addr, 
	ufs_renesas_poll(hba, 0xd4, BIT(8), BIT(8));

}



static void ufs_renesas_restore_800_80c_poll(struct ufs_hba *hba, u32 index)

{

	ufs_renesas_write_d0_d4(hba, 0x0000080c, 0x00000100);

	ufs_renesas_write(hba, 0xd0, 0x00000800);

	ufs_renesas_restore(hba, 0xd4, index);

	ufs_renesas_write(hba, 0xd0, 0x0000080c);

	ufs_renesas_poll(hba, 0xd4, BIT(8), BIT(8));

}



static void ufs_renesas_write_804_80c_poll(struct ufs_hba *hba, u32 addr, u32 data_804)

{

	ufs_renesas_write_d0_d4(hba, 0x0000080c, 0x00000100);
@@ -220,6 +170,8 @@ static void ufs_renesas_write_phy(struct ufs_hba *hba, u32 addr16, u32 data16) 


static void ufs_renesas_set_phy(struct ufs_hba *hba, u32 addr16, u32 data16)

{

	u32 low, high;



	ufs_renesas_write(hba, 0xf0, 1);

	ufs_renesas_write_800_80c_poll(hba, 0x16, addr16 & 0xff);

	ufs_renesas_write_800_80c_poll(hba, 0x17, (addr16 >> 8) & 0xff);
@@ -227,22 +179,15 @@ static void ufs_renesas_set_phy(struct ufs_hba *hba, u32 addr16, u32 data16) 
	ufs_renesas_write_828_82c_poll(hba, 0x0f000000);

	ufs_renesas_write_804_80c_poll(hba, 0x1a, 0);

	ufs_renesas_write(hba, 0xd0, 0x00000808);

	ufs_renesas_save(hba, 0xd4, 0xff, SET_PHY_INDEX_LO);

	low = ufs_renesas_read(hba, 0xd4) & 0xff;

	ufs_renesas_write_804_80c_poll(hba, 0x1b, 0);

	ufs_renesas_write(hba, 0xd0, 0x00000808);

	ufs_renesas_save(hba, 0xd4, 0xff, SET_PHY_INDEX_HI);

	ufs_renesas_write_828_82c_poll(hba, 0x0f000000);

	ufs_renesas_write(hba, 0xf0, 0);

	ufs_renesas_write(hba, 0xf0, 1);

	ufs_renesas_write_800_80c_poll(hba, 0x16, addr16 & 0xff);

	ufs_renesas_write_800_80c_poll(hba, 0x17, (addr16 >> 8) & 0xff);

	ufs_renesas_set(hba, SET_PHY_INDEX_LO, ((data16 & 0xff) << 16) | BIT(8) | 0x18);

	ufs_renesas_restore_800_80c_poll(hba, SET_PHY_INDEX_LO);

	ufs_renesas_set(hba, SET_PHY_INDEX_HI, (((data16 >> 8) & 0xff) << 16) | BIT(8) | 0x19);

	ufs_renesas_restore_800_80c_poll(hba, SET_PHY_INDEX_HI);

	ufs_renesas_write_800_80c_poll(hba, 0x1c, 0x01);

	high = ufs_renesas_read(hba, 0xd4) & 0xff;

	ufs_renesas_write_828_82c_poll(hba, 0x0f000000);

	ufs_renesas_write(hba, 0xf0, 0);



	data16 |= (high << 8) | low;

	ufs_renesas_write_phy(hba, addr16, data16);

}



static void ufs_renesas_indirect_write(struct ufs_hba *hba, u32 gpio, u32 addr,
@@ -266,6 +211,8 @@ static void ufs_renesas_indirect_poll(struct ufs_hba *hba, u32 gpio, u32 addr, 


static void ufs_renesas_pre_init(struct ufs_hba *hba)

{

	u32 timer_val;



	/* This setting is for SERIES B */

	ufs_renesas_write(hba, 0xc0, 0x49425308);

	ufs_renesas_write_d0_d4(hba, 0x00000104, 0x00000002);
@@ -292,7 +239,7 @@ static void ufs_renesas_pre_init(struct ufs_hba *hba) 
	ufs_renesas_poll(hba, 0xd4, BIT(8) | BIT(6) | BIT(0), BIT(8) | BIT(6) | BIT(0));



	ufs_renesas_write(hba, 0xd0, 0x00000d00);

	ufs_renesas_save(hba, 0xd4, 0x0000ffff, TIMER_INDEX);

	timer_val = ufs_renesas_read(hba, 0xd4) & 0x0000ffff;

	ufs_renesas_write(hba, 0xd4, 0x00000000);

	ufs_renesas_write_d0_d4(hba, 0x0000082c, 0x0f000000);

	ufs_renesas_write_d0_d4(hba, 0x00000828, 0x08000000);
@@ -387,7 +334,7 @@ static void ufs_renesas_pre_init(struct ufs_hba *hba) 


	ufs_renesas_write(hba, 0xf0, 0);

	ufs_renesas_write(hba, 0xd0, 0x00000d00);

	ufs_renesas_restore(hba, 0xd4, TIMER_INDEX);

	ufs_renesas_write(hba, 0xd4, timer_val);

}



static int ufs_renesas_hce_enable_notify(struct ufs_hba *hba,