Commit 518a368c authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher
Browse files

drm/amd/display: Update cursor offload assignments 



[Why & How]
- Cursor lines per chunk must be assigned from hubp->att and not
  hubp->pos (the one in hubp->pos is unassigned)
- In DCN401 DPP, cur0_enable in attribute struct must be assigned
  as this is the field passed to DMU
- DCN401 should not program position in driver if offload is enabled

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: default avatarWayne Lin <wayne.lin@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fb3896c1

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c

+1 −0
Original line number Diff line number Diff line
@@ -141,6 +141,7 @@ void dpp401_set_cursor_position( 
	}



	dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;

	dpp_base->att.cur0_ctl.bits.cur0_enable = cur_en;

}



void dpp401_set_optional_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

+13 −11
Original line number Diff line number Diff line
@@ -783,10 +783,12 @@ void hubp401_cursor_set_position( 
		if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)

			hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);



		if (!hubp->cursor_offload)

			REG_UPDATE(CURSOR_CONTROL,

				CURSOR_ENABLE, cur_en);

	}



	if (!hubp->cursor_offload) {

		REG_SET_2(CURSOR_POSITION, 0,

			CURSOR_X_POSITION, x_pos,

			CURSOR_Y_POSITION, y_pos);
@@ -797,7 +799,7 @@ void hubp401_cursor_set_position( 


		REG_SET(CURSOR_DST_OFFSET, 0,

			CURSOR_DST_X_OFFSET, dst_x_offset);



	}

	/* Cursor Position Register Config */

	hubp->pos.cur_ctl.bits.cur_enable = cur_en;

	hubp->pos.position.bits.x_pos = pos->x;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -1699,7 +1699,7 @@ void dcn35_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe 
	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE = hubp->att.cur_ctl.bits.mode;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY = hubp->pos.cur_ctl.bits.cur_2x_magnify;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH = hubp->att.cur_ctl.bits.pitch;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->pos.cur_ctl.bits.line_per_chunk;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->att.cur_ctl.bits.line_per_chunk;



	p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_ENABLE = dpp->att.cur0_ctl.bits.cur0_enable;

	p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_MODE = dpp->att.cur0_ctl.bits.mode;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -2996,7 +2996,7 @@ void dcn401_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pip 
	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE = hubp->att.cur_ctl.bits.mode;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY = hubp->pos.cur_ctl.bits.cur_2x_magnify;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH = hubp->att.cur_ctl.bits.pitch;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->pos.cur_ctl.bits.line_per_chunk;

	p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->att.cur_ctl.bits.line_per_chunk;



	p->CM_CUR0_CURSOR0_CONTROL__CUR0_ENABLE = dpp->att.cur0_ctl.bits.cur0_enable;

	p->CM_CUR0_CURSOR0_CONTROL__CUR0_MODE = dpp->att.cur0_ctl.bits.mode;