Commit 518c550e authored by Nam Cao's avatar Nam Cao Committed by Paul Walmsley
Browse files

riscv: kprobes: Move branch_funct3 to insn.h 



Similar to other instruction-processing macros/functions, branch_funct3
should be in insn.h.

Move it into insn.h as RV_EXTRACT_FUNCT3. This new name matches the style
in insn.h.

Signed-off-by: default avatarNam Cao <namcao@linutronix.de>
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/linux-riscv/200c29a26338f19d09963fa02562787e8cfa06f2.1747215274.git.namcao@linutronix.de/


[pjw@kernel.org: updated to use RV_X_MASK and to apply]
Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 5fe59140

arch/riscv/include/asm/insn.h

+5 −0
Original line number Diff line number Diff line
@@ -454,6 +454,11 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) 
#define RVC_RS2(insn)		RV_X(insn, SH_RS2C, 5)

#define RVC_X(X, s, mask)	RV_X_MASK(X, s, mask)



#define RV_EXTRACT_FUNCT3(x) \

	({typeof(x) x_ = (x); \

	(RV_X_MASK(x_, RV_INSN_FUNCT3_OPOFF, \

		   RV_INSN_FUNCT3_MASK >> RV_INSN_FUNCT3_OPOFF)); })



#define RV_EXTRACT_RS1_REG(x) \

	({typeof(x) x_ = (x); \

	(RV_X_MASK(x_, RVG_RS1_OPOFF, RVG_RS1_MASK)); })

arch/riscv/kernel/probes/simulate-insn.c

+1 −4
Original line number Diff line number Diff line
@@ -121,9 +121,6 @@ bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *re 
#define branch_rs1_idx(opcode) \

	(((opcode) >> 15) & 0x1f)



#define branch_funct3(opcode) \

	(((opcode) >> 12) & 0x7)



#define branch_imm(opcode) \

	(((((opcode) >>  8) & 0xf ) <<  1) | \

	 ((((opcode) >> 25) & 0x3f) <<  5) | \
@@ -158,7 +155,7 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r 
		return false;



	offset_tmp = branch_offset(opcode);

	switch (branch_funct3(opcode)) {

	switch (RV_EXTRACT_FUNCT3(opcode)) {

	case RVG_FUNCT3_BEQ:

		offset = (rs1_val == rs2_val) ? offset_tmp : 4;

		break;