Commit 51b252cc authored by Miquel Raynal's avatar Miquel Raynal
Browse files

mtd: spinand: Define octal operations 



SPI NAND chips may support octal "read from cache" and "program load"
transfers. List the opcodes by defining the relevant macros describing
these operations.

However, due to the hardware available I had, 0x82 and 0xc2 are
untested and given as reference, only 0xc4 could be (successfully)
tested.

Controllers supporting operations mixing SDR and DTR operations might
even leverage octal DTR data I/O transfers.

Acked-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parent ac3a4b17

include/linux/mtd/spinand.h

+33 −0
Original line number Diff line number Diff line
@@ -170,6 +170,27 @@ 
		   SPI_MEM_DTR_OP_DATA_IN(len, buf, 4),			\

		   SPI_MEM_OP_MAX_FREQ(freq))



#define SPINAND_PAGE_READ_FROM_CACHE_1S_1S_8S_OP(addr, ndummy, buf, len, freq) \

	SPI_MEM_OP(SPI_MEM_OP_CMD(0x8b, 1),				\

		   SPI_MEM_OP_ADDR(2, addr, 1),				\

		   SPI_MEM_OP_DUMMY(ndummy, 1),				\

		   SPI_MEM_OP_DATA_IN(len, buf, 8),			\

		   SPI_MEM_OP_MAX_FREQ(freq))



#define SPINAND_PAGE_READ_FROM_CACHE_1S_8S_8S_OP(addr, ndummy, buf, len, freq) \

	SPI_MEM_OP(SPI_MEM_OP_CMD(0xcb, 1),				\

		   SPI_MEM_OP_ADDR(2, addr, 8),				\

		   SPI_MEM_OP_DUMMY(ndummy, 8),				\

		   SPI_MEM_OP_DATA_IN(len, buf, 8),			\

		   SPI_MEM_OP_MAX_FREQ(freq))



#define SPINAND_PAGE_READ_FROM_CACHE_1S_1D_8D_OP(addr, ndummy, buf, len, freq) \

	SPI_MEM_OP(SPI_MEM_OP_CMD(0x9d, 1),				\

		   SPI_MEM_DTR_OP_ADDR(2, addr, 1),			\

		   SPI_MEM_DTR_OP_DUMMY(ndummy, 1),			\

		   SPI_MEM_DTR_OP_DATA_IN(len, buf, 8),			\

		   SPI_MEM_OP_MAX_FREQ(freq))



#define SPINAND_PROG_EXEC_1S_1S_0_OP(addr)				\

	SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1),				\

		   SPI_MEM_OP_ADDR(3, addr, 1),				\
@@ -188,6 +209,18 @@ 
		   SPI_MEM_OP_NO_DUMMY,					\

		   SPI_MEM_OP_DATA_OUT(len, buf, 4))



#define SPINAND_PROG_LOAD_1S_1S_8S_OP(addr, buf, len)			\

	SPI_MEM_OP(SPI_MEM_OP_CMD(0x82, 1),				\

		   SPI_MEM_OP_ADDR(2, addr, 1),				\

		   SPI_MEM_OP_NO_DUMMY,					\

		   SPI_MEM_OP_DATA_OUT(len, buf, 8))



#define SPINAND_PROG_LOAD_1S_8S_8S_OP(reset, addr, buf, len)		\

	SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0xc2 : 0xc4, 1),		\

		   SPI_MEM_OP_ADDR(2, addr, 8),				\

		   SPI_MEM_OP_NO_DUMMY,					\

		   SPI_MEM_OP_DATA_OUT(len, buf, 8))



/**

 * Standard SPI NAND flash commands

 */