Commit 51f2d009 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/pps: convert to drm device based logging 



Prefer drm device based logging.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3caf86f20680478763321e8e3a5fbfa30ab06ec3.1642769982.git.jani.nikula@intel.com
parent c5274e86

drivers/gpu/drm/i915/display/intel_pps.c

+13 −9
Original line number Diff line number Diff line
@@ -1131,9 +1131,12 @@ intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq) 
}



static void

intel_pps_dump_state(const char *state_name, const struct edp_power_seq *seq)

intel_pps_dump_state(struct intel_dp *intel_dp, const char *state_name,

		     const struct edp_power_seq *seq)

{

	DRM_DEBUG_KMS("%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);



	drm_dbg_kms(&i915->drm, "%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",

		    state_name,

		    seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12);

}
@@ -1141,6 +1144,7 @@ intel_pps_dump_state(const char *state_name, const struct edp_power_seq *seq) 
static void

intel_pps_verify_state(struct intel_dp *intel_dp)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);

	struct edp_power_seq hw;

	struct edp_power_seq *sw = &intel_dp->pps.pps_delays;
@@ -1148,9 +1152,9 @@ intel_pps_verify_state(struct intel_dp *intel_dp) 


	if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 ||

	    hw.t10 != sw->t10 || hw.t11_t12 != sw->t11_t12) {

		DRM_ERROR("PPS state mismatch\n");

		intel_pps_dump_state("sw", sw);

		intel_pps_dump_state("hw", &hw);

		drm_err(&i915->drm, "PPS state mismatch\n");

		intel_pps_dump_state(intel_dp, "sw", sw);

		intel_pps_dump_state(intel_dp, "hw", &hw);

	}

}
@@ -1168,7 +1172,7 @@ static void pps_init_delays(struct intel_dp *intel_dp) 


	intel_pps_readout_hw_state(intel_dp, &cur);



	intel_pps_dump_state("cur", &cur);

	intel_pps_dump_state(intel_dp, "cur", &cur);



	vbt = dev_priv->vbt.edp.pps;

	/* On Toshiba Satellite P50-C-18C system the VBT T12 delay
@@ -1200,7 +1204,7 @@ static void pps_init_delays(struct intel_dp *intel_dp) 
	 * too. */

	spec.t11_t12 = (510 + 100) * 10;



	intel_pps_dump_state("vbt", &vbt);

	intel_pps_dump_state(intel_dp, "vbt", &vbt);



	/* Use the max of the register settings and vbt. If both are

	 * unset, fall back to the spec limits. */