Commit 520133b0 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.18-2025-10-16' of... 

Merge tag 'amd-drm-fixes-6.18-2025-10-16' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.18-2025-10-16:

amdgpu:
- Backlight fix
- SI fixes
- CIK fix
- Make CE support debug only
- IP discovery fix
- Ring reset fixes
- GPUVM fault memory barrier fix
- Drop unused structures in amdgpu_drm.h
- JPEG debugfs fix
- VRAM handling fixes for GPUs without VRAM
- GC 12 MES fixes

amdkfd:
- MES fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20251016132224.2534946-1-alexander.deucher@amd.com
parents f69f31e5 079ae511

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1290,6 +1290,7 @@ struct amdgpu_device { 
	bool                            debug_disable_gpu_ring_reset;

	bool                            debug_vm_userptr;

	bool                            debug_disable_ce_logs;

	bool                            debug_enable_ce_cs;



	/* Protection for the following isolation structure */

	struct mutex                    enforce_isolation_mutex;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+2 −3
Original line number Diff line number Diff line
@@ -2329,10 +2329,9 @@ void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_mem *mem) 
int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,

					  struct kfd_vm_fault_info *mem)

{

	if (atomic_read(&adev->gmc.vm_fault_info_updated) == 1) {

	if (atomic_read_acquire(&adev->gmc.vm_fault_info_updated) == 1) {

		*mem = *adev->gmc.vm_fault_info;

		mb(); /* make sure read happened */

		atomic_set(&adev->gmc.vm_fault_info_updated, 0);

		atomic_set_release(&adev->gmc.vm_fault_info_updated, 0);

	}

	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+7 −1
Original line number Diff line number Diff line
@@ -364,6 +364,12 @@ static int amdgpu_cs_p2_ib(struct amdgpu_cs_parser *p, 
	if (p->uf_bo && ring->funcs->no_user_fence)

		return -EINVAL;



	if (!p->adev->debug_enable_ce_cs &&

	    chunk_ib->flags & AMDGPU_IB_FLAG_CE) {

		dev_err_ratelimited(p->adev->dev, "CE CS is blocked, use debug=0x400 to override\n");

		return -EINVAL;

	}



	if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX &&

	    chunk_ib->flags & AMDGPU_IB_FLAG_PREEMPT) {

		if (chunk_ib->flags & AMDGPU_IB_FLAG_CE)
@@ -702,7 +708,7 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev, 
	 */

	const s64 us_upper_bound = 200000;



	if (!adev->mm_stats.log2_max_MBps) {

	if ((!adev->mm_stats.log2_max_MBps) || !ttm_resource_manager_used(&adev->mman.vram_mgr.manager)) {

		*max_bytes = 0;

		*max_vis_bytes = 0;

		return;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+7 −0
Original line number Diff line number Diff line
@@ -1882,6 +1882,13 @@ static bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device 


static bool amdgpu_device_aspm_support_quirk(struct amdgpu_device *adev)

{

	/* Enabling ASPM causes randoms hangs on Tahiti and Oland on Zen4.

	 * It's unclear if this is a platform-specific or GPU-specific issue.

	 * Disable ASPM on SI for the time being.

	 */

	if (adev->family == AMDGPU_FAMILY_SI)

		return true;



#if IS_ENABLED(CONFIG_X86)

	struct cpuinfo_x86 *c = &cpu_data(0);

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+17 −1
Original line number Diff line number Diff line
@@ -1033,6 +1033,8 @@ static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, 
	/* Until a uniform way is figured, get mask based on hwid */

	switch (hw_id) {

	case VCN_HWID:

		/* VCN vs UVD+VCE */

		if (!amdgpu_ip_version(adev, VCE_HWIP, 0))

			harvest = ((1 << inst) & adev->vcn.inst_mask) == 0;

		break;

	case DMU_HWID:
@@ -2565,7 +2567,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		vega10_reg_base_init(adev);

		adev->sdma.num_instances = 2;

		adev->sdma.sdma_mask = 3;

		adev->gmc.num_umc = 4;

		adev->gfx.xcc_mask = 1;

		adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0);

		adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0);

		adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0);
@@ -2592,7 +2596,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		vega10_reg_base_init(adev);

		adev->sdma.num_instances = 2;

		adev->sdma.sdma_mask = 3;

		adev->gmc.num_umc = 4;

		adev->gfx.xcc_mask = 1;

		adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0);

		adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0);

		adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1);
@@ -2619,8 +2625,10 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		vega10_reg_base_init(adev);

		adev->sdma.num_instances = 1;

		adev->sdma.sdma_mask = 1;

		adev->vcn.num_vcn_inst = 1;

		adev->gmc.num_umc = 2;

		adev->gfx.xcc_mask = 1;

		if (adev->apu_flags & AMD_APU_IS_RAVEN2) {

			adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0);

			adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, 0);
@@ -2665,7 +2673,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		vega20_reg_base_init(adev);

		adev->sdma.num_instances = 2;

		adev->sdma.sdma_mask = 3;

		adev->gmc.num_umc = 8;

		adev->gfx.xcc_mask = 1;

		adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0);

		adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0);

		adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0);
@@ -2693,8 +2703,10 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		arct_reg_base_init(adev);

		adev->sdma.num_instances = 8;

		adev->sdma.sdma_mask = 0xff;

		adev->vcn.num_vcn_inst = 2;

		adev->gmc.num_umc = 8;

		adev->gfx.xcc_mask = 1;

		adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1);

		adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1);

		adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1);
@@ -2726,8 +2738,10 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_discovery_init(adev);

		aldebaran_reg_base_init(adev);

		adev->sdma.num_instances = 5;

		adev->sdma.sdma_mask = 0x1f;

		adev->vcn.num_vcn_inst = 2;

		adev->gmc.num_umc = 4;

		adev->gfx.xcc_mask = 1;

		adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2);

		adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2);

		adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0);
@@ -2762,6 +2776,8 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		} else {

			cyan_skillfish_reg_base_init(adev);

			adev->sdma.num_instances = 2;

			adev->sdma.sdma_mask = 3;

			adev->gfx.xcc_mask = 1;

			adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(2, 0, 3);

			adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(2, 0, 3);

			adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(5, 0, 1);