Commit 5205628a authored by Neil Armstrong's avatar Neil Armstrong Committed by Jerome Brunet
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clk: meson: g12a: add CSI & ISP gates clocks



Add the gates entries for the CSI ISP domain and CSI PHYs.

[jbrunet: fixed checkpatch spelling warning]
Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: default avatarDaniel Scally <dan.scally@ideasonboard.com>
Tested-by: default avatarDaniel Scally <dan.scally@ideasonboard.com>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-3-223958791501@linaro.org


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 773e4e98
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+9 −0
Original line number Diff line number Diff line
@@ -4306,9 +4306,12 @@ static MESON_GATE(g12a_htx_hdcp22, HHI_GCLK_MPEG2, 3);
static MESON_GATE(g12a_htx_pclk,		HHI_GCLK_MPEG2,	4);
static MESON_GATE(g12a_bt656,			HHI_GCLK_MPEG2,	6);
static MESON_GATE(g12a_usb1_to_ddr,		HHI_GCLK_MPEG2,	8);
static MESON_GATE(g12b_mipi_isp_gate,		HHI_GCLK_MPEG2,	17);
static MESON_GATE(g12a_mmc_pclk,		HHI_GCLK_MPEG2,	11);
static MESON_GATE(g12a_uart2,			HHI_GCLK_MPEG2,	15);
static MESON_GATE(g12a_vpu_intr,		HHI_GCLK_MPEG2,	25);
static MESON_GATE(g12b_csi_phy1,		HHI_GCLK_MPEG2,	28);
static MESON_GATE(g12b_csi_phy0,		HHI_GCLK_MPEG2,	29);
static MESON_GATE(g12a_gic,			HHI_GCLK_MPEG2,	30);

static MESON_GATE(g12a_vclk2_venci0,		HHI_GCLK_OTHER,	1);
@@ -4828,6 +4831,9 @@ static struct clk_hw *g12b_hw_clks[] = {
	[CLKID_MIPI_ISP_SEL]		= &g12b_mipi_isp_sel.hw,
	[CLKID_MIPI_ISP_DIV]		= &g12b_mipi_isp_div.hw,
	[CLKID_MIPI_ISP]		= &g12b_mipi_isp.hw,
	[CLKID_MIPI_ISP_GATE]		= &g12b_mipi_isp_gate.hw,
	[CLKID_MIPI_ISP_CSI_PHY0]	= &g12b_csi_phy0.hw,
	[CLKID_MIPI_ISP_CSI_PHY1]	= &g12b_csi_phy1.hw,
};

static struct clk_hw *sm1_hw_clks[] = {
@@ -5327,6 +5333,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
	&g12b_mipi_isp_sel,
	&g12b_mipi_isp_div,
	&g12b_mipi_isp,
	&g12b_mipi_isp_gate,
	&g12b_csi_phy1,
	&g12b_csi_phy0,
};

static const struct reg_sequence g12a_init_regs[] = {