Commit 5229c1d6 authored by Devi Priya's avatar Devi Priya Committed by Bjorn Andersson
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arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks



Use assigned-clock-rates property for configuring the QUP I2C core clocks
to operate at nominal frequency.

Signed-off-by: default avatarDevi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 507f9db1
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+8 −0
Original line number Diff line number Diff line
@@ -410,6 +410,8 @@ blsp1_i2c1: i2c@78b6000 {
			clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
				 <&gcc GCC_BLSP1_AHB_CLK>;
			clock-names = "core", "iface";
			assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
			assigned-clock-rates = <50000000>;
			dmas = <&blsp_dma 14>, <&blsp_dma 15>;
			dma-names = "tx", "rx";
			status = "disabled";
@@ -438,6 +440,8 @@ blsp1_i2c2: i2c@78b7000 {
			clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
				 <&gcc GCC_BLSP1_AHB_CLK>;
			clock-names = "core", "iface";
			assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
			assigned-clock-rates = <50000000>;
			dmas = <&blsp_dma 16>, <&blsp_dma 17>;
			dma-names = "tx", "rx";
			status = "disabled";
@@ -466,6 +470,8 @@ blsp1_i2c3: i2c@78b8000 {
			clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
				 <&gcc GCC_BLSP1_AHB_CLK>;
			clock-names = "core", "iface";
			assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
			assigned-clock-rates = <50000000>;
			dmas = <&blsp_dma 18>, <&blsp_dma 19>;
			dma-names = "tx", "rx";
			status = "disabled";
@@ -495,6 +501,8 @@ blsp1_i2c4: i2c@78b9000 {
			clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
				 <&gcc GCC_BLSP1_AHB_CLK>;
			clock-names = "core", "iface";
			assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
			assigned-clock-rates = <50000000>;
			dmas = <&blsp_dma 20>, <&blsp_dma 21>;
			dma-names = "tx", "rx";
			status = "disabled";