Commit 528dd46d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'net-6.10-rc8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

Pull more networking fixes from Jakub Kicinski:
 "A quick follow up to yesterday's pull. We got a regressions report for
  the bnxt patch as soon as it got to your tree. The ethtool fix is also
  good to have, although it's an older regression.

  Current release - regressions:

   - eth: bnxt_en: fix crash in bnxt_get_max_rss_ctx_ring() on older HW
     when user tries to decrease the ring count

  Previous releases - regressions:

   - ethtool: fix RSS setting, accept "no change" setting if the driver
     doesn't support the new features

   - eth: i40e: remove needless retries of NVM update, don't wait 20min
     when we know the firmware update won't succeed"

* tag 'net-6.10-rc8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net:
  bnxt_en: Fix crash in bnxt_get_max_rss_ctx_ring()
  octeontx2-af: fix issue with IPv4 match for RSS
  octeontx2-af: fix issue with IPv6 ext match for RSS
  octeontx2-af: fix detection of IP layer
  octeontx2-af: fix a issue with cpt_lf_alloc mailbox
  octeontx2-af: replace cpt slot with lf id on reg write
  i40e: fix: remove needless retries of NVM update
  net: ethtool: Fix RSS setting
parents 975f3b6d f7ce5eb2

drivers/net/ethernet/broadcom/bnxt/bnxt.c

+3 −0
Original line number Diff line number Diff line
@@ -6151,6 +6151,9 @@ u16 bnxt_get_max_rss_ctx_ring(struct bnxt *bp) 
	u16 i, tbl_size, max_ring = 0;

	struct bnxt_rss_ctx *rss_ctx;



	if (!BNXT_SUPPORTS_MULTI_RSS_CTX(bp))

		return 0;



	tbl_size = bnxt_get_rxfh_indir_size(bp->dev);



	list_for_each_entry(rss_ctx, &bp->rss_ctx_list, list) {

drivers/net/ethernet/intel/i40e/i40e_adminq.h

+0 −4
Original line number Diff line number Diff line
@@ -109,10 +109,6 @@ static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 
		-EFBIG,      /* I40E_AQ_RC_EFBIG */

	};



	/* aq_rc is invalid if AQ timed out */

	if (aq_ret == -EIO)

		return -EAGAIN;



	if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0]))))

		return -ERANGE;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+1 −1
Original line number Diff line number Diff line
@@ -1745,7 +1745,7 @@ struct cpt_lf_alloc_req_msg { 
	u16 nix_pf_func;

	u16 sso_pf_func;

	u16 eng_grpmsk;

	int blkaddr;

	u8 blkaddr;

	u8 ctx_ilen_valid : 1;

	u8 ctx_ilen : 7;

};

drivers/net/ethernet/marvell/octeontx2/af/npc.h

+6 −2
Original line number Diff line number Diff line
@@ -63,8 +63,13 @@ enum npc_kpu_lb_ltype { 
	NPC_LT_LB_CUSTOM1 = 0xF,

};



/* Don't modify ltypes up to IP6_EXT, otherwise length and checksum of IP

 * headers may not be checked correctly. IPv4 ltypes and IPv6 ltypes must

 * differ only at bit 0 so mask 0xE can be used to detect extended headers.

 */

enum npc_kpu_lc_ltype {

	NPC_LT_LC_IP = 1,

	NPC_LT_LC_PTP = 1,

	NPC_LT_LC_IP,

	NPC_LT_LC_IP_OPT,

	NPC_LT_LC_IP6,

	NPC_LT_LC_IP6_EXT,
@@ -72,7 +77,6 @@ enum npc_kpu_lc_ltype { 
	NPC_LT_LC_RARP,

	NPC_LT_LC_MPLS,

	NPC_LT_LC_NSH,

	NPC_LT_LC_PTP,

	NPC_LT_LC_FCOE,

	NPC_LT_LC_NGIO,

	NPC_LT_LC_CUSTOM0 = 0xE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

+16 −7
Original line number Diff line number Diff line
@@ -696,7 +696,8 @@ int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu, 
					struct cpt_rd_wr_reg_msg *req,

					struct cpt_rd_wr_reg_msg *rsp)

{

	int blkaddr;

	u64 offset = req->reg_offset;

	int blkaddr, lf;



	blkaddr = validate_and_get_cpt_blkaddr(req->blkaddr);

	if (blkaddr < 0)
@@ -707,17 +708,25 @@ int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu, 
	    !is_cpt_vf(rvu, req->hdr.pcifunc))

		return CPT_AF_ERR_ACCESS_DENIED;



	rsp->reg_offset = req->reg_offset;

	rsp->ret_val = req->ret_val;

	rsp->is_write = req->is_write;



	if (!is_valid_offset(rvu, req))

		return CPT_AF_ERR_ACCESS_DENIED;



	/* Translate local LF used by VFs to global CPT LF */

	lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr], req->hdr.pcifunc,

			(offset & 0xFFF) >> 3);



	/* Translate local LF's offset to global CPT LF's offset */

	offset &= 0xFF000;

	offset += lf << 3;



	rsp->reg_offset = offset;

	rsp->ret_val = req->ret_val;

	rsp->is_write = req->is_write;



	if (req->is_write)

		rvu_write64(rvu, blkaddr, req->reg_offset, req->val);

		rvu_write64(rvu, blkaddr, offset, req->val);

	else

		rsp->val = rvu_read64(rvu, blkaddr, req->reg_offset);

		rsp->val = rvu_read64(rvu, blkaddr, offset);



	return 0;

}