Commit 532f6f60 authored by Gustavo Sousa's avatar Gustavo Sousa Committed by Matt Roper
Browse files

drm/i915/display: Use platform check in HAS_LT_PHY() 



NVL uses the Lake Tahoe PHY for display output and the driver recently
added the macro HAS_LT_PHY() to allow selecting code paths specific for
that type of PHY.

While NVL uses Xe3p_LPD as display IP, the type of PHY is actually
defined at the SoC level, so use a platform check instead of display
version.

Bspec: 74199
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Link: https://patch.msgid.link/20251202012306.9315-7-matthew.s.atwood@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent 8fad5413

drivers/gpu/drm/i915/display/intel_lt_phy.h

+1 −1
Original line number Diff line number Diff line
@@ -42,6 +42,6 @@ void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, 
			      const struct intel_crtc_state *crtc_state);

void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);



#define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35)

#define HAS_LT_PHY(display) ((display)->platform.novalake)



#endif /* __INTEL_LT_PHY_H__ */