Commit 54376fe1 authored by Johan Hovold's avatar Johan Hovold Committed by Bjorn Andersson
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arm64: dts: qcom: x1e80100: fix PCIe5 interconnect 



The fifth PCIe controller is connected to the PCIe North ANoC.

Fix the corresponding interconnect property so that the OS manages the
right path.

Fixes: 62ab23e1 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes")
Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241024131101.13587-3-johan+linaro@kernel.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent f3bba5eb

arch/arm64/boot/dts/qcom/x1e80100.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -3102,7 +3102,7 @@ pcie5: pci@1c00000 { 
			assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>;

			assigned-clock-rates = <19200000>;



			interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS

			interconnects = <&pcie_north_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS

					 &cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>;