Commit 544cebe1 authored by Sai Prakash Ranjan's avatar Sai Prakash Ranjan Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7280: Add Coresight support 



Add coresight components found on SC7280 SoC.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: default avatarSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/de07324628f88900b72357f4ef7f0c7db7e3409d.1615832893.git.saiprakash.ranjan@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 208979a8

arch/arm64/boot/dts/qcom/sc7280.dtsi

+489 −0
Original line number Diff line number Diff line
@@ -316,6 +316,495 @@ uart5: serial@994000 { 
			};

		};



		stm@6002000 {

			compatible = "arm,coresight-stm", "arm,primecell";

			reg = <0 0x06002000 0 0x1000>,

			      <0 0x16280000 0 0x180000>;

			reg-names = "stm-base", "stm-stimulus-base";



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					stm_out: endpoint {

						remote-endpoint = <&funnel0_in7>;

					};

				};

			};

		};



		funnel@6041000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x06041000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					funnel0_out: endpoint {

						remote-endpoint = <&merge_funnel_in0>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@7 {

					reg = <7>;

					funnel0_in7: endpoint {

						remote-endpoint = <&stm_out>;

					};

				};

			};

		};



		funnel@6042000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x06042000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					funnel1_out: endpoint {

						remote-endpoint = <&merge_funnel_in1>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@4 {

					reg = <4>;

					funnel1_in4: endpoint {

						remote-endpoint = <&apss_merge_funnel_out>;

					};

				};

			};

		};



		funnel@6045000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x06045000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					merge_funnel_out: endpoint {

						remote-endpoint = <&swao_funnel_in>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					merge_funnel_in0: endpoint {

						remote-endpoint = <&funnel0_out>;

					};

				};



				port@1 {

					reg = <1>;

					merge_funnel_in1: endpoint {

						remote-endpoint = <&funnel1_out>;

					};

				};

			};

		};



		replicator@6046000 {

			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";

			reg = <0 0x06046000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					replicator_out: endpoint {

						remote-endpoint = <&etr_in>;

					};

				};

			};



			in-ports {

				port {

					replicator_in: endpoint {

						remote-endpoint = <&swao_replicator_out>;

					};

				};

			};

		};



		etr@6048000 {

			compatible = "arm,coresight-tmc", "arm,primecell";

			reg = <0 0x06048000 0 0x1000>;

			iommus = <&apps_smmu 0x04c0 0>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,scatter-gather;



			in-ports {

				port {

					etr_in: endpoint {

						remote-endpoint = <&replicator_out>;

					};

				};

			};

		};



		funnel@6b04000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x06b04000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					swao_funnel_out: endpoint {

						remote-endpoint = <&etf_in>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@7 {

					reg = <7>;

					swao_funnel_in: endpoint {

						remote-endpoint = <&merge_funnel_out>;

					};

				};

			};

		};



		etf@6b05000 {

			compatible = "arm,coresight-tmc", "arm,primecell";

			reg = <0 0x06b05000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					etf_out: endpoint {

						remote-endpoint = <&swao_replicator_in>;

					};

				};

			};



			in-ports {

				port {

					etf_in: endpoint {

						remote-endpoint = <&swao_funnel_out>;

					};

				};

			};

		};



		replicator@6b06000 {

			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";

			reg = <0 0x06b06000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			qcom,replicator-loses-context;



			out-ports {

				port {

					swao_replicator_out: endpoint {

						remote-endpoint = <&replicator_in>;

					};

				};

			};



			in-ports {

				port {

					swao_replicator_in: endpoint {

						remote-endpoint = <&etf_out>;

					};

				};

			};

		};



		etm@7040000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07040000 0 0x1000>;



			cpu = <&CPU0>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm0_out: endpoint {

						remote-endpoint = <&apss_funnel_in0>;

					};

				};

			};

		};



		etm@7140000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07140000 0 0x1000>;



			cpu = <&CPU1>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm1_out: endpoint {

						remote-endpoint = <&apss_funnel_in1>;

					};

				};

			};

		};



		etm@7240000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07240000 0 0x1000>;



			cpu = <&CPU2>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm2_out: endpoint {

						remote-endpoint = <&apss_funnel_in2>;

					};

				};

			};

		};



		etm@7340000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07340000 0 0x1000>;



			cpu = <&CPU3>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm3_out: endpoint {

						remote-endpoint = <&apss_funnel_in3>;

					};

				};

			};

		};



		etm@7440000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07440000 0 0x1000>;



			cpu = <&CPU4>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm4_out: endpoint {

						remote-endpoint = <&apss_funnel_in4>;

					};

				};

			};

		};



		etm@7540000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07540000 0 0x1000>;



			cpu = <&CPU5>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm5_out: endpoint {

						remote-endpoint = <&apss_funnel_in5>;

					};

				};

			};

		};



		etm@7640000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07640000 0 0x1000>;



			cpu = <&CPU6>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm6_out: endpoint {

						remote-endpoint = <&apss_funnel_in6>;

					};

				};

			};

		};



		etm@7740000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";

			reg = <0 0x07740000 0 0x1000>;



			cpu = <&CPU7>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";

			arm,coresight-loses-context-with-cpu;

			qcom,skip-power-up;



			out-ports {

				port {

					etm7_out: endpoint {

						remote-endpoint = <&apss_funnel_in7>;

					};

				};

			};

		};



		funnel@7800000 { /* APSS Funnel */

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x07800000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					apss_funnel_out: endpoint {

						remote-endpoint = <&apss_merge_funnel_in>;

					};

				};

			};



			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					apss_funnel_in0: endpoint {

						remote-endpoint = <&etm0_out>;

					};

				};



				port@1 {

					reg = <1>;

					apss_funnel_in1: endpoint {

						remote-endpoint = <&etm1_out>;

					};

				};



				port@2 {

					reg = <2>;

					apss_funnel_in2: endpoint {

						remote-endpoint = <&etm2_out>;

					};

				};



				port@3 {

					reg = <3>;

					apss_funnel_in3: endpoint {

						remote-endpoint = <&etm3_out>;

					};

				};



				port@4 {

					reg = <4>;

					apss_funnel_in4: endpoint {

						remote-endpoint = <&etm4_out>;

					};

				};



				port@5 {

					reg = <5>;

					apss_funnel_in5: endpoint {

						remote-endpoint = <&etm5_out>;

					};

				};



				port@6 {

					reg = <6>;

					apss_funnel_in6: endpoint {

						remote-endpoint = <&etm6_out>;

					};

				};



				port@7 {

					reg = <7>;

					apss_funnel_in7: endpoint {

						remote-endpoint = <&etm7_out>;

					};

				};

			};

		};



		funnel@7810000 {

			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";

			reg = <0 0x07810000 0 0x1000>;



			clocks = <&aoss_qmp>;

			clock-names = "apb_pclk";



			out-ports {

				port {

					apss_merge_funnel_out: endpoint {

						remote-endpoint = <&funnel1_in4>;

					};

				};

			};



			in-ports {

				port {

					apss_merge_funnel_in: endpoint {

						remote-endpoint = <&apss_funnel_out>;

					};

				};

			};

		};



		system-cache-controller@9200000 {

			compatible = "qcom,sc7280-llcc";

			reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>;