Commit 547aad32 authored by Saleemkhan Jamadar's avatar Saleemkhan Jamadar Committed by Alex Deucher
Browse files

drm/amdgpu: add VCN4 ip block support 



Add VCN 4.0.5 initialization and decoder/encoder ring functions.

v2 - update license year (Leo Liu)

Signed-off-by: default avatarSaleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c2066c5f

drivers/gpu/drm/amd/amdgpu/Makefile

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@@ -206,6 +206,7 @@ amdgpu-y += \ 
	vcn_v3_0.o \

	vcn_v4_0.o \

	vcn_v4_0_3.o \

	vcn_v4_0_5.o \

	amdgpu_jpeg.o \

	jpeg_v1_0.o \

	jpeg_v2_0.o \

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

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+1779 −0

File added.

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drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.h

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/*

 * Copyright 2023 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */



#ifndef __VCN_V4_0_5_H__

#define __VCN_V4_0_5_H__



enum amdgpu_vcn_v4_0_5_sub_block {

	AMDGPU_VCN_V4_0_5_VCPU_VCODEC = 0,



	AMDGPU_VCN_V4_0_5_MAX_SUB_BLOCK,

};



extern const struct amdgpu_ip_block_version vcn_v4_0_5_ip_block;



#endif /* __VCN_V4_0_5_H__ */