Commit 548f9a3c authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Geert Uytterhoeven
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clk: renesas: r8a779h0: Add display clocks 



Add display related clocks for DU, DSI, FCPVD, and VSPD.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241206-rcar-gh-dsi-v3-5-d74c2166fa15@ideasonboard.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent ee47b941

drivers/clk/renesas/r8a779h0-cpg-mssr.c

+4 −0
Original line number Diff line number Diff line
@@ -177,6 +177,9 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { 
	DEF_MOD("canfd0",	328,	R8A779H0_CLK_SASYNCPERD2),

	DEF_MOD("csi40",	331,	R8A779H0_CLK_CSI),

	DEF_MOD("csi41",	400,	R8A779H0_CLK_CSI),

	DEF_MOD("dis0",		411,	R8A779H0_CLK_VIOBUSD2),

	DEF_MOD("dsitxlink0",	415,	R8A779H0_CLK_VIOBUSD2),

	DEF_MOD("fcpvd0",	508,	R8A779H0_CLK_VIOBUSD2),

	DEF_MOD("hscif0",	514,	R8A779H0_CLK_SASYNCPERD1),

	DEF_MOD("hscif1",	515,	R8A779H0_CLK_SASYNCPERD1),

	DEF_MOD("hscif2",	516,	R8A779H0_CLK_SASYNCPERD1),
@@ -225,6 +228,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { 
	DEF_MOD("vin15",	811,	R8A779H0_CLK_S0D4_VIO),

	DEF_MOD("vin16",	812,	R8A779H0_CLK_S0D4_VIO),

	DEF_MOD("vin17",	813,	R8A779H0_CLK_S0D4_VIO),

	DEF_MOD("vspd0",	830,	R8A779H0_CLK_VIOBUSD2),

	DEF_MOD("wdt1:wdt0",	907,	R8A779H0_CLK_R),

	DEF_MOD("cmt0",		910,	R8A779H0_CLK_R),

	DEF_MOD("cmt1",		911,	R8A779H0_CLK_R),