Commit 551ee0f2 authored by Paloma Arellano's avatar Paloma Arellano Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: add division of drm_display_mode's hskew parameter 



Setting up the timing engine when the physical encoder has a split role
neglects dividing the drm_display_mode's hskew parameter. Let's fix this
since this must also be done in preparation for implementing YUV420 over
DP.

Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support")
Signed-off-by: default avatarPaloma Arellano <quic_parellan@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/579605/
Link: https://lore.kernel.org/r/20240222194025.25329-3-quic_parellan@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 32b6ff95

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+4 −2
Original line number Diff line number Diff line
@@ -260,12 +260,14 @@ static void dpu_encoder_phys_vid_setup_timing_engine( 
		mode.htotal >>= 1;

		mode.hsync_start >>= 1;

		mode.hsync_end >>= 1;

		mode.hskew >>= 1;



		DPU_DEBUG_VIDENC(phys_enc,

			"split_role %d, halve horizontal %d %d %d %d\n",

			"split_role %d, halve horizontal %d %d %d %d %d\n",

			phys_enc->split_role,

			mode.hdisplay, mode.htotal,

			mode.hsync_start, mode.hsync_end);

			mode.hsync_start, mode.hsync_end,

			mode.hskew);

	}



	drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params);