Commit 553f23d1 authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski
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net: stmmac: s32: move PHY_INTF_SEL_x definitions out of the way



S32's PHY_INTF_SEL_x definitions conflict with those for the dwmac
cores as they use a different bitmapping. Add a S32 prefix so that
they are unique.

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: default avatarMaxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: default avatarJan Petrous (OSS) <jan.petrous@oss.nxp.com>
Link: https://patch.msgid.link/E1vFt4S-0000000ChoS-2Ahi@rmk-PC.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent dec568a3
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+5 −5
Original line number Diff line number Diff line
@@ -24,10 +24,10 @@
#define GMAC_INTF_RATE_125M	125000000	/* 125MHz */

/* SoC PHY interface control register */
#define PHY_INTF_SEL_MII	0x00
#define PHY_INTF_SEL_SGMII	0x01
#define PHY_INTF_SEL_RGMII	0x02
#define PHY_INTF_SEL_RMII	0x08
#define S32_PHY_INTF_SEL_MII	0x00
#define S32_PHY_INTF_SEL_SGMII	0x01
#define S32_PHY_INTF_SEL_RGMII	0x02
#define S32_PHY_INTF_SEL_RMII	0x08

struct s32_priv_data {
	void __iomem *ioaddr;
@@ -40,7 +40,7 @@ struct s32_priv_data {

static int s32_gmac_write_phy_intf_select(struct s32_priv_data *gmac)
{
	writel(PHY_INTF_SEL_RGMII, gmac->ctrl_sts);
	writel(S32_PHY_INTF_SEL_RGMII, gmac->ctrl_sts);

	dev_dbg(gmac->dev, "PHY mode set to %s\n", phy_modes(*gmac->intf_mode));