Commit 5548e8a4 authored by Russell King (Oracle)'s avatar Russell King (Oracle)
Browse files

ARM: use BIT() and GENMASK() for fault status register fields 



Modernise the fault status field definitions by using BIT() and
GENMASK().

Reviewed-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
parent 9c46fcaf

arch/arm/mm/fault.h

+6 −6
Original line number Diff line number Diff line
@@ -5,12 +5,12 @@ 
/*

 * Fault status register encodings.  We steal bit 31 for our own purposes.

 */

#define FSR_LNX_PF		(1 << 31)

#define FSR_CM			(1 << 13)

#define FSR_WRITE		(1 << 11)

#define FSR_FS4			(1 << 10)

#define FSR_FS3_0		(15)

#define FSR_FS5_0		(0x3f)

#define FSR_LNX_PF		BIT(31)

#define FSR_CM			BIT(13)

#define FSR_WRITE		BIT(11)

#define FSR_FS4			BIT(10)

#define FSR_FS3_0		GENMASK(3, 0)

#define FSR_FS5_0		GENMASK(5, 0)



#ifdef CONFIG_ARM_LPAE

#define FSR_FS_AEA		17