Loading arch/arm/boot/dts/berlin2cd.dtsi +24 −29 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" #include <dt-bindings/clock/berlin2.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { Loading @@ -30,26 +31,12 @@ cpu@0 { }; }; clocks { smclk: sysmgr-clock { refclk: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; cfgclk: cfg-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <75000000>; }; sysclk: system-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <300000000>; }; }; soc { compatible = "simple-bus"; #address-cells = <1>; Loading @@ -76,7 +63,7 @@ local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&sysclk>; clocks = <&chip CLKID_TWD>; }; apb@e80000 { Loading Loading @@ -163,7 +150,7 @@ timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; Loading @@ -172,7 +159,7 @@ timer1: timer@2c14 { compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; Loading @@ -181,7 +168,7 @@ timer2: timer@2c28 { compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -190,7 +177,7 @@ timer3: timer@2c3c { compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -199,7 +186,7 @@ timer4: timer@2c50 { compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -208,7 +195,7 @@ timer5: timer@2c64 { compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -217,7 +204,7 @@ timer6: timer@2c78 { compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -226,7 +213,7 @@ timer7: timer@2c8c { compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -241,6 +228,14 @@ aic: interrupt-controller@3000 { }; }; chip: chip-control@ea0000 { compatible = "marvell,berlin2cd-chip-ctrl"; #clock-cells = <1>; reg = <0xea0000 0x400>; clocks = <&refclk>; clock-names = "refclk"; }; apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; Loading Loading @@ -285,7 +280,7 @@ uart0: serial@9000 { reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; clocks = <&smclk>; clocks = <&refclk>; status = "disabled"; }; Loading @@ -295,7 +290,7 @@ uart1: serial@a000 { reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; clocks = <&smclk>; clocks = <&refclk>; status = "disabled"; }; Loading Loading
arch/arm/boot/dts/berlin2cd.dtsi +24 −29 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" #include <dt-bindings/clock/berlin2.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { Loading @@ -30,26 +31,12 @@ cpu@0 { }; }; clocks { smclk: sysmgr-clock { refclk: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; cfgclk: cfg-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <75000000>; }; sysclk: system-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <300000000>; }; }; soc { compatible = "simple-bus"; #address-cells = <1>; Loading @@ -76,7 +63,7 @@ local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&sysclk>; clocks = <&chip CLKID_TWD>; }; apb@e80000 { Loading Loading @@ -163,7 +150,7 @@ timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; Loading @@ -172,7 +159,7 @@ timer1: timer@2c14 { compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; Loading @@ -181,7 +168,7 @@ timer2: timer@2c28 { compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -190,7 +177,7 @@ timer3: timer@2c3c { compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -199,7 +186,7 @@ timer4: timer@2c50 { compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -208,7 +195,7 @@ timer5: timer@2c64 { compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -217,7 +204,7 @@ timer6: timer@2c78 { compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -226,7 +213,7 @@ timer7: timer@2c8c { compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; clocks = <&cfgclk>; clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; Loading @@ -241,6 +228,14 @@ aic: interrupt-controller@3000 { }; }; chip: chip-control@ea0000 { compatible = "marvell,berlin2cd-chip-ctrl"; #clock-cells = <1>; reg = <0xea0000 0x400>; clocks = <&refclk>; clock-names = "refclk"; }; apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; Loading Loading @@ -285,7 +280,7 @@ uart0: serial@9000 { reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; clocks = <&smclk>; clocks = <&refclk>; status = "disabled"; }; Loading @@ -295,7 +290,7 @@ uart1: serial@a000 { reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; clocks = <&smclk>; clocks = <&refclk>; status = "disabled"; }; Loading