Commit 561322c3 authored by Mika Kahola's avatar Mika Kahola
Browse files

drm/i915/display: Skip state verification with TBT-ALT mode 



With TBT-ALT mode we are not programming C20 chip PLL's and
hence we don't need to check state verification. We don't
need to program DP link signal levels i.e.pre-emphasis and
voltage swing either.

This patch fixes dmesg errors like this one

"[drm] ERROR PHY F Write 0c06 failed after 3 retries."

Signed-off-by: default avatarMika Kahola <mika.kahola@intel.com>
Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231129122221.1109084-1-mika.kahola@intel.com
parent 9f82f165

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+10 −1
Original line number Diff line number Diff line
@@ -415,9 +415,15 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder, 
	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	const struct intel_ddi_buf_trans *trans;

	enum phy phy = intel_port_to_phy(i915, encoder->port);

	u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);

	u8 owned_lane_mask;

	intel_wakeref_t wakeref;

	int n_entries, ln;

	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);



	if (intel_tc_port_in_tbt_alt_mode(dig_port))

		return;



	owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);



	wakeref = intel_cx0_phy_transaction_begin(encoder);
@@ -3136,6 +3142,9 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state, 
	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);

	phy = intel_port_to_phy(i915, encoder->port);



	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))

		return;



	intel_cx0pll_readout_hw_state(encoder, &mpll_hw_state);



	if (intel_is_c10phy(i915, phy))