Commit 561a22d9 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'bnxt_en-bug-fixes' 

Pavan Chebbi says:

====================
bnxt_en: Bug fixes

This patchset adds the following fixes for bnxt:

Patch #1 fixes DPC AER handling to make it more reliable

Patch #2 fixes incorrect capping bp->max_tpa based on what the FW
supports

Patch #3 fixes ignoring of VNIC configuration result when RDMA
driver is loading

Patch #4 fixes logic to make phase adjustment on the PPS OUT signal
====================

Link: https://patch.msgid.link/20260504083611.1383776-1-pavan.chebbi@broadcom.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 5ad509c1 bd279e10

drivers/net/ethernet/broadcom/bnxt/bnxt.c

+12 −4
Original line number Diff line number Diff line
@@ -3825,7 +3825,10 @@ static int bnxt_alloc_tpa_info(struct bnxt *bp) 
	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {

		if (!bp->max_tpa_v2)

			return 0;

		bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5);

		bp->max_tpa = min_t(u16, bp->max_tpa_v2, MAX_TPA_P5);

		/* Older P5 FW sets max_tpa_v2 low by mistake except NPAR */

		if (bp->max_tpa <= 32 && BNXT_CHIP_P5(bp) && !BNXT_NPAR(bp))

			bp->max_tpa = MAX_TPA_P5;

	}



	for (i = 0; i < bp->rx_nr_rings; i++) {
@@ -17360,9 +17363,14 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev) 


	netdev_info(bp->dev, "PCI Slot Reset\n");



	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&

	    test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state))

		msleep(900);

	if (test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state)) {

		/* After DPC, the chip should return CRS when the vendor ID

		 * config register is read until it is ready.  On all chips,

		 * this is not happening reliably so add a 5-second delay as a

		 * workaround.

		 */

		msleep(5000);

	}



	netdev_lock(netdev);

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

+5 −24
Original line number Diff line number Diff line
@@ -419,31 +419,13 @@ void bnxt_ptp_reapply_pps(struct bnxt *bp) 
	}

}



static int bnxt_get_target_cycles(struct bnxt_ptp_cfg *ptp, u64 target_ns,

				  u64 *cycles_delta)

{

	u64 cycles_now;

	u64 nsec_now, nsec_delta;

	int rc;



	rc = bnxt_refclk_read(ptp->bp, NULL, &cycles_now);

	if (rc)

		return rc;



	nsec_now = bnxt_timecounter_cyc2time(ptp, cycles_now);



	nsec_delta = target_ns - nsec_now;

	*cycles_delta = div64_u64(nsec_delta << ptp->cc.shift, ptp->cc.mult);

	return 0;

}



static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,

			       struct ptp_clock_request *rq)

{

	struct hwrm_func_ptp_cfg_input *req;

	struct bnxt *bp = ptp->bp;

	struct timespec64 ts;

	u64 target_ns, delta;

	u64 target_ns;

	u16 enables;

	int rc;
@@ -451,10 +433,6 @@ static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp, 
	ts.tv_nsec = rq->perout.start.nsec;

	target_ns = timespec64_to_ns(&ts);



	rc = bnxt_get_target_cycles(ptp, target_ns, &delta);

	if (rc)

		return rc;



	rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);

	if (rc)

		return rc;
@@ -468,7 +446,10 @@ static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp, 
	req->ptp_freq_adj_dll_phase = 0;

	req->ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);

	req->ptp_freq_adj_ext_up = 0;

	req->ptp_freq_adj_ext_phase_lower = cpu_to_le32(delta);

	req->ptp_freq_adj_ext_phase_lower =

		cpu_to_le32(lower_32_bits(target_ns));

	req->ptp_freq_adj_ext_phase_upper =

		cpu_to_le32(upper_32_bits(target_ns));



	return hwrm_req_send(bp, req);

}

drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c

+8 −2
Original line number Diff line number Diff line
@@ -175,8 +175,14 @@ int bnxt_register_dev(struct bnxt_en_dev *edev, 
	ulp->handle = handle;

	rcu_assign_pointer(ulp->ulp_ops, ulp_ops);



	if (test_bit(BNXT_STATE_OPEN, &bp->state))

		bnxt_hwrm_vnic_cfg(bp, &bp->vnic_info[BNXT_VNIC_DEFAULT]);

	if (test_bit(BNXT_STATE_OPEN, &bp->state)) {

		rc = bnxt_hwrm_vnic_cfg(bp, &bp->vnic_info[BNXT_VNIC_DEFAULT]);

		if (rc) {

			netdev_err(dev, "Failed to configure dual VNIC mode\n");

			RCU_INIT_POINTER(ulp->ulp_ops, NULL);

			goto exit;

		}

	}



	edev->ulp_tbl->msix_requested = bnxt_get_ulp_msix_num(bp);