Commit 56342da3 authored by Hamza Mahfooz's avatar Hamza Mahfooz Committed by Alex Deucher
Browse files

drm/amd/display: prevent register access while in IPS 



We can't read/write to DCN registers while in IPS. Since, that can cause
the system to hang. So, before proceeding with the access in that
scenario, force the system out of IPS.

Cc: stable@vger.kernel.org # 6.6+
Reviewed-by: default avatarRoman Li <roman.li@amd.com>
Signed-off-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 84801d4f

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+10 −0
Original line number Diff line number Diff line
@@ -11437,6 +11437,12 @@ void amdgpu_dm_trigger_timing_sync(struct drm_device *dev) 
	mutex_unlock(&adev->dm.dc_lock);

}



static inline void amdgpu_dm_exit_ips_for_hw_access(struct dc *dc)

{

	if (dc->ctx->dmub_srv && !dc->ctx->dmub_srv->idle_exit_counter)

		dc_exit_ips_for_hw_access(dc);

}



void dm_write_reg_func(const struct dc_context *ctx, uint32_t address,

		       u32 value, const char *func_name)

{
@@ -11447,6 +11453,8 @@ void dm_write_reg_func(const struct dc_context *ctx, uint32_t address, 
		return;

	}

#endif



	amdgpu_dm_exit_ips_for_hw_access(ctx->dc);

	cgs_write_register(ctx->cgs_device, address, value);

	trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value);

}
@@ -11470,6 +11478,8 @@ uint32_t dm_read_reg_func(const struct dc_context *ctx, uint32_t address, 
		return 0;

	}



	amdgpu_dm_exit_ips_for_hw_access(ctx->dc);



	value = cgs_read_register(ctx->cgs_device, address);



	trace_amdgpu_dc_rreg(&ctx->perf_trace->read_count, address, value);