Commit 563cb0b1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'cxl-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl 

Pull cxl updates from Dave Jiang:

 - Constify range_contains() input parameters to prevent changes

 - Add support for displaying RCD capabilities in sysfs to support lspci
   for CXL device

 - Downgrade warning message to debug in cxl_probe_component_regs()

 - Add support for adding a printf specifier '%pra' to emit 'struct
   range' content:
     - Add sanity tests for 'struct resource'
     - Add documentation for special case
     - Add %pra for 'struct range'
     - Add %pra usage in CXL code

 - Add preparation code for DCD support:
     - Add range_overlaps()
     - Add CDAT DSMAS table shared and read only flag in ACPICA
     - Add documentation to 'struct dev_dax_range'
     - Delay event buffer allocation in CXL PCI code until needed
     - Use guard() in cxl_dpa_set_mode()
     - Refactor create region code to consolidate common code

* tag 'cxl-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl:
  cxl/region: Refactor common create region code
  cxl/hdm: Use guard() in cxl_dpa_set_mode()
  cxl/pci: Delay event buffer allocation
  dax: Document struct dev_dax_range
  ACPI/CDAT: Add CDAT/DSMAS shared and read only flag values
  range: Add range_overlaps()
  cxl/cdat: Use %pra for dpa range outputs
  printf: Add print format (%pra) for struct range
  Documentation/printf: struct resource add start == end special case
  test printf: Add very basic struct resource tests
  cxl: downgrade a warning message to debug level in cxl_probe_component_regs()
  cxl/pci: Add sysfs attribute for CXL 1.1 device link status
  cxl/core/regs: Add rcd_pcie_cap initialization
  kernel/range: Const-ify range_contains parameters
parents 28eb75e1 a83383e2

Documentation/core-api/printk-formats.rst

+19 −1
Original line number Diff line number Diff line
@@ -209,12 +209,17 @@ Struct Resources 
::



	%pr	[mem 0x60000000-0x6fffffff flags 0x2200] or

		[mem 0x60000000 flags 0x2200] or

		[mem 0x0000000060000000-0x000000006fffffff flags 0x2200]

		[mem 0x0000000060000000 flags 0x2200]

	%pR	[mem 0x60000000-0x6fffffff pref] or

		[mem 0x60000000 pref] or

		[mem 0x0000000060000000-0x000000006fffffff pref]

		[mem 0x0000000060000000 pref]



For printing struct resources. The ``R`` and ``r`` specifiers result in a

printed resource with (R) or without (r) a decoded flags member.

printed resource with (R) or without (r) a decoded flags member.  If start is

equal to end only print the start value.



Passed by reference.
@@ -231,6 +236,19 @@ width of the CPU data path. 


Passed by reference.



Struct Range

------------



::



	%pra    [range 0x0000000060000000-0x000000006fffffff] or

		[range 0x0000000060000000]



For printing struct range.  struct range holds an arbitrary range of u64

values.  If start is equal to end only print the start value.



Passed by reference.



DMA address types dma_addr_t

----------------------------

drivers/cxl/core/cdat.c

+4 −4
Original line number Diff line number Diff line
@@ -247,8 +247,8 @@ static void update_perf_entry(struct device *dev, struct dsmas_entry *dent, 
	dpa_perf->dpa_range = dent->dpa_range;

	dpa_perf->qos_class = dent->qos_class;

	dev_dbg(dev,

		"DSMAS: dpa: %#llx qos: %d read_bw: %d write_bw %d read_lat: %d write_lat: %d\n",

		dent->dpa_range.start, dpa_perf->qos_class,

		"DSMAS: dpa: %pra qos: %d read_bw: %d write_bw %d read_lat: %d write_lat: %d\n",

		&dent->dpa_range, dpa_perf->qos_class,

		dent->coord[ACCESS_COORDINATE_CPU].read_bandwidth,

		dent->coord[ACCESS_COORDINATE_CPU].write_bandwidth,

		dent->coord[ACCESS_COORDINATE_CPU].read_latency,
@@ -279,8 +279,8 @@ static void cxl_memdev_set_qos_class(struct cxl_dev_state *cxlds, 
			 range_contains(&pmem_range, &dent->dpa_range))

			update_perf_entry(dev, dent, &mds->pmem_perf);

		else

			dev_dbg(dev, "no partition for dsmas dpa: %#llx\n",

				dent->dpa_range.start);

			dev_dbg(dev, "no partition for dsmas dpa: %pra\n",

				&dent->dpa_range);

	}

}

drivers/cxl/core/core.h

+5 −0
Original line number Diff line number Diff line
@@ -89,6 +89,11 @@ resource_size_t __rcrb_to_component(struct device *dev, 
				    enum cxl_rcrb which);

u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb);



#define PCI_RCRB_CAP_LIST_ID_MASK	GENMASK(7, 0)

#define PCI_RCRB_CAP_HDR_ID_MASK	GENMASK(7, 0)

#define PCI_RCRB_CAP_HDR_NEXT_MASK	GENMASK(15, 8)

#define PCI_CAP_EXP_SIZEOF		0x3c



extern struct rw_semaphore cxl_dpa_rwsem;

extern struct rw_semaphore cxl_region_rwsem;

drivers/cxl/core/hdm.c

+6 −15
Original line number Diff line number Diff line
@@ -424,7 +424,6 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled, 
	struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);

	struct cxl_dev_state *cxlds = cxlmd->cxlds;

	struct device *dev = &cxled->cxld.dev;

	int rc;



	switch (mode) {

	case CXL_DECODER_RAM:
@@ -435,11 +434,9 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled, 
		return -EINVAL;

	}



	down_write(&cxl_dpa_rwsem);

	if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {

		rc = -EBUSY;

		goto out;

	}

	guard(rwsem_write)(&cxl_dpa_rwsem);

	if (cxled->cxld.flags & CXL_DECODER_F_ENABLE)

		return -EBUSY;



	/*

	 * Only allow modes that are supported by the current partition
@@ -447,21 +444,15 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled, 
	 */

	if (mode == CXL_DECODER_PMEM && !resource_size(&cxlds->pmem_res)) {

		dev_dbg(dev, "no available pmem capacity\n");

		rc = -ENXIO;

		goto out;

		return -ENXIO;

	}

	if (mode == CXL_DECODER_RAM && !resource_size(&cxlds->ram_res)) {

		dev_dbg(dev, "no available ram capacity\n");

		rc = -ENXIO;

		goto out;

		return -ENXIO;

	}



	cxled->mode = mode;

	rc = 0;

out:

	up_write(&cxl_dpa_rwsem);



	return rc;

	return 0;

}



int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)

drivers/cxl/core/region.c

+11 −17
Original line number Diff line number Diff line
@@ -2537,9 +2537,8 @@ static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd, 
	return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM);

}



static ssize_t create_pmem_region_store(struct device *dev,

					struct device_attribute *attr,

					const char *buf, size_t len)

static ssize_t create_region_store(struct device *dev, const char *buf,

				   size_t len, enum cxl_decoder_mode mode)

{

	struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);

	struct cxl_region *cxlr;
@@ -2549,31 +2548,26 @@ static ssize_t create_pmem_region_store(struct device *dev, 
	if (rc != 1)

		return -EINVAL;



	cxlr = __create_region(cxlrd, CXL_DECODER_PMEM, id);

	cxlr = __create_region(cxlrd, mode, id);

	if (IS_ERR(cxlr))

		return PTR_ERR(cxlr);



	return len;

}



static ssize_t create_pmem_region_store(struct device *dev,

					struct device_attribute *attr,

					const char *buf, size_t len)

{

	return create_region_store(dev, buf, len, CXL_DECODER_PMEM);

}

DEVICE_ATTR_RW(create_pmem_region);



static ssize_t create_ram_region_store(struct device *dev,

				       struct device_attribute *attr,

				       const char *buf, size_t len)

{

	struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);

	struct cxl_region *cxlr;

	int rc, id;



	rc = sscanf(buf, "region%d\n", &id);

	if (rc != 1)

		return -EINVAL;



	cxlr = __create_region(cxlrd, CXL_DECODER_RAM, id);

	if (IS_ERR(cxlr))

		return PTR_ERR(cxlr);



	return len;

	return create_region_store(dev, buf, len, CXL_DECODER_RAM);

}

DEVICE_ATTR_RW(create_ram_region);