Commit 567ebfed authored by Marc Zyngier's avatar Marc Zyngier Committed by Oliver Upton
Browse files

KVM: arm64: vgic-v3: Fix GICv3 trapping in protected mode 



As we are about to start trapping a bunch of extra things, augment
the pKVM trap description with all the registers trapped by ICH_HCR_EL2.TC,
making them legal instead of resulting in a UNDEF injection in the guest.

While we're at it, ensure that pKVM captures the vgic model so that it
can be checked by the emulation code.

Tested-by: default avatarFuad Tabba <tabba@google.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Tested-by: default avatarMark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-6-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oupton@kernel.org>
parent 8d3dfab1

arch/arm64/kvm/hyp/nvhe/pkvm.c

+3 −0
Original line number Diff line number Diff line
@@ -337,6 +337,9 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc 
	/* CTR_EL0 is always under host control, even for protected VMs. */

	hyp_vm->kvm.arch.ctr_el0 = host_kvm->arch.ctr_el0;



	/* Preserve the vgic model so that GICv3 emulation works */

	hyp_vm->kvm.arch.vgic.vgic_model = host_kvm->arch.vgic.vgic_model;



	if (test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &host_kvm->arch.flags))

		set_bit(KVM_ARCH_FLAG_MTE_ENABLED, &kvm->arch.flags);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

+5 −0
Original line number Diff line number Diff line
@@ -444,6 +444,8 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = { 


	/* Scalable Vector Registers are restricted. */



	HOST_HANDLED(SYS_ICC_PMR_EL1),



	RAZ_WI(SYS_ERRIDR_EL1),

	RAZ_WI(SYS_ERRSELR_EL1),

	RAZ_WI(SYS_ERXFR_EL1),
@@ -457,9 +459,12 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = { 


	/* Limited Ordering Regions Registers are restricted. */



	HOST_HANDLED(SYS_ICC_DIR_EL1),

	HOST_HANDLED(SYS_ICC_RPR_EL1),

	HOST_HANDLED(SYS_ICC_SGI1R_EL1),

	HOST_HANDLED(SYS_ICC_ASGI1R_EL1),

	HOST_HANDLED(SYS_ICC_SGI0R_EL1),

	HOST_HANDLED(SYS_ICC_CTLR_EL1),

	{ SYS_DESC(SYS_ICC_SRE_EL1), .access = pvm_gic_read_sre, },



	HOST_HANDLED(SYS_CCSIDR_EL1),