Commit 56cf7ef0 authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Keith Busch
Browse files

nvme-pci: skip CMB blocks incompatible with PCI P2P DMA 



The PCI P2PDMA code will register the CMB block to the memory
hot-plugging subsystem, which have an alignment requirement. Memory
blocks that do not satisfy this alignment requirement (usually 2MB) will
lead to a WARNING from memory hotplugging.

Verify the CMB block's address and size against the alignment and only
try to send CMB blocks compatible with it to prevent this warning.

Tested on Intel DC D4502 SSD, which has a 512K CMB block that is too
small for memory hotplugging (thus PCI P2PDMA).

Signed-off-by: default avatarIcenowy Zheng <uwu@icenowy.me>
Signed-off-by: default avatarKeith Busch <kbusch@kernel.org>
parent 6a3572e1

drivers/nvme/host/pci.c

+12 −8
Original line number Diff line number Diff line
@@ -1982,6 +1982,18 @@ static void nvme_map_cmb(struct nvme_dev *dev) 
	if (offset > bar_size)

		return;



	/*

	 * Controllers may support a CMB size larger than their BAR, for

	 * example, due to being behind a bridge. Reduce the CMB to the

	 * reported size of the BAR

	 */

	size = min(size, bar_size - offset);



	if (!IS_ALIGNED(size, memremap_compat_align()) ||

	    !IS_ALIGNED(pci_resource_start(pdev, bar),

			memremap_compat_align()))

		return;



	/*

	 * Tell the controller about the host side address mapping the CMB,

	 * and enable CMB decoding for the NVMe 1.4+ scheme:
@@ -1992,14 +2004,6 @@ static void nvme_map_cmb(struct nvme_dev *dev) 
			     dev->bar + NVME_REG_CMBMSC);

	}



	/*

	 * Controllers may support a CMB size larger than their BAR,

	 * for example, due to being behind a bridge. Reduce the CMB to

	 * the reported size of the BAR

	 */

	if (size > bar_size - offset)

		size = bar_size - offset;



	if (pci_p2pdma_add_resource(pdev, bar, size, offset)) {

		dev_warn(dev->ctrl.device,

			 "failed to register the CMB\n");