Commit 570e8579 authored by Damien Le Moal's avatar Damien Le Moal Committed by Lorenzo Pieralisi
Browse files

PCI: cadence: Use INTX instead of legacy 

In the Cadence endpoint controller driver, rename the function
cdns_pcie_ep_send_legacy_irq() to cdns_pcie_ep_send_intx_irq() to match
the macro PCI_IRQ_INTX name. Related comments and messages mentioning
"legacy" are also changed to refer to "intx".

Link: https://lore.kernel.org/r/20231122060406.14695-9-dlemoal@kernel.org


Signed-off-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
parent c5d973a0

drivers/pci/controller/cadence/pcie-cadence-ep.c

+5 −5
Original line number Diff line number Diff line
@@ -360,7 +360,7 @@ static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, u8 intx, 
	writel(0, ep->irq_cpu_addr + offset);

}



static int cdns_pcie_ep_send_legacy_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,

static int cdns_pcie_ep_send_intx_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,

				      u8 intx)

{

	u16 cmd;
@@ -371,7 +371,7 @@ static int cdns_pcie_ep_send_legacy_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn, 


	cdns_pcie_ep_assert_intx(ep, fn, intx, true);

	/*

	 * The mdelay() value was taken from dra7xx_pcie_raise_legacy_irq()

	 * The mdelay() value was taken from dra7xx_pcie_raise_intx_irq()

	 */

	mdelay(1);

	cdns_pcie_ep_assert_intx(ep, fn, intx, false);
@@ -541,10 +541,10 @@ static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, u8 vfn, 
	switch (type) {

	case PCI_IRQ_INTX:

		if (vfn > 0) {

			dev_err(dev, "Cannot raise legacy interrupts for VF\n");

			dev_err(dev, "Cannot raise INTX interrupts for VF\n");

			return -EINVAL;

		}

		return cdns_pcie_ep_send_legacy_irq(ep, fn, vfn, 0);

		return cdns_pcie_ep_send_intx_irq(ep, fn, vfn, 0);



	case PCI_IRQ_MSI:

		return cdns_pcie_ep_send_msi_irq(ep, fn, vfn, interrupt_num);

drivers/pci/controller/cadence/pcie-cadence.h

+6 −6
Original line number Diff line number Diff line
@@ -347,16 +347,16 @@ struct cdns_pcie_epf { 
 * @max_regions: maximum number of regions supported by hardware

 * @ob_region_map: bitmask of mapped outbound regions

 * @ob_addr: base addresses in the AXI bus where the outbound regions start

 * @irq_phys_addr: base address on the AXI bus where the MSI/legacy IRQ

 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ

 *		   dedicated outbound regions is mapped.

 * @irq_cpu_addr: base address in the CPU space where a write access triggers

 *		  the sending of a memory write (MSI) / normal message (legacy

 *		  the sending of a memory write (MSI) / normal message (INTX

 *		  IRQ) TLP through the PCIe bus.

 * @irq_pci_addr: used to save the current mapping of the MSI/legacy IRQ

 * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ

 *		  dedicated outbound region.

 * @irq_pci_fn: the latest PCI function that has updated the mapping of

 *		the MSI/legacy IRQ dedicated outbound region.

 * @irq_pending: bitmask of asserted legacy IRQs.

 *		the MSI/INTX IRQ dedicated outbound region.

 * @irq_pending: bitmask of asserted INTX IRQs.

 * @lock: spin lock to disable interrupts while modifying PCIe controller

 *        registers fields (RMW) accessible by both remote RC and EP to

 *        minimize time between read and write
@@ -374,7 +374,7 @@ struct cdns_pcie_ep { 
	u64			irq_pci_addr;

	u8			irq_pci_fn;

	u8			irq_pending;

	/* protect writing to PCI_STATUS while raising legacy interrupts */

	/* protect writing to PCI_STATUS while raising INTX interrupts */

	spinlock_t		lock;

	struct cdns_pcie_epf	*epf;

	unsigned int		quirk_detect_quiet_flag:1;