Commit 5773cce8 authored by Puranam V G Tejaswi's avatar Puranam V G Tejaswi Committed by Rob Clark
Browse files

drm/msm/a6xx: Add support for A663 



Add support for Adreno 663 found on sa8775p based platforms.

Signed-off-by: default avatarPuranam V G Tejaswi <quic_pvgtejas@quicinc.com>
Signed-off-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620768/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 45a4f888

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

+19 −0
Original line number Diff line number Diff line
@@ -972,6 +972,25 @@ static const struct adreno_info a6xx_gpus[] = { 
			.prim_fifo_threshold = 0x00300200,

		},

		.address_space_size = SZ_16G,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x06060300),

		.family = ADRENO_6XX_GEN4,

		.fw = {

			[ADRENO_FW_SQE] = "a660_sqe.fw",

			[ADRENO_FW_GMU] = "a663_gmu.bin",

		},

		.gmem = SZ_1M + SZ_512K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT |

			ADRENO_QUIRK_HAS_HW_APRIV,

		.init = a6xx_gpu_init,

		.a6xx = &(const struct a6xx_info) {

			.hwcg = a690_hwcg,

			.protect = &a660_protect,

			.gmu_cgc_mode = 0x00020200,

			.prim_fifo_threshold = 0x00300200,

		},

		.address_space_size = SZ_16G,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x06030500),

		.family = ADRENO_6XX_GEN4,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+10 −1
Original line number Diff line number Diff line
@@ -635,6 +635,15 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) 
		gpu->ubwc_config.macrotile_mode = 1;

	}



	if (adreno_is_a663(gpu)) {

		gpu->ubwc_config.highest_bank_bit = 13;

		gpu->ubwc_config.amsbc = 1;

		gpu->ubwc_config.rgb565_predicator = 1;

		gpu->ubwc_config.uavflagprd_inv = 2;

		gpu->ubwc_config.macrotile_mode = 1;

		gpu->ubwc_config.ubwc_swizzle = 0x4;

	}



	if (adreno_is_7c3(gpu)) {

		gpu->ubwc_config.highest_bank_bit = 14;

		gpu->ubwc_config.amsbc = 1;
@@ -1240,7 +1249,7 @@ static int hw_init(struct msm_gpu *gpu) 
	if (adreno_is_a690(adreno_gpu))

		gpu_write(gpu, REG_A6XX_UCHE_CMDQ_CONFIG, 0x90);

	/* Set dualQ + disable afull for A660 GPU */

	else if (adreno_is_a660(adreno_gpu))

	else if (adreno_is_a660(adreno_gpu) || adreno_is_a663(adreno_gpu))

		gpu_write(gpu, REG_A6XX_UCHE_CMDQ_CONFIG, 0x66906);

	else if (adreno_is_a7xx(adreno_gpu))

		gpu_write(gpu, REG_A6XX_UCHE_CMDQ_CONFIG,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

+33 −0
Original line number Diff line number Diff line
@@ -478,6 +478,37 @@ static void a660_build_bw_table(struct a6xx_hfi_msg_bw_table *msg) 
	msg->cnoc_cmds_data[1][0] =  0x60000001;

}



static void a663_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)

{

	/*

	 * Send a single "off" entry just to get things running

	 * TODO: bus scaling

	 */

	msg->bw_level_num = 1;



	msg->ddr_cmds_num = 3;

	msg->ddr_wait_bitmask = 0x07;



	msg->ddr_cmds_addrs[0] = 0x50004;

	msg->ddr_cmds_addrs[1] = 0x50000;

	msg->ddr_cmds_addrs[2] = 0x500b4;



	msg->ddr_cmds_data[0][0] =  0x40000000;

	msg->ddr_cmds_data[0][1] =  0x40000000;

	msg->ddr_cmds_data[0][2] =  0x40000000;



	/*

	 * These are the CX (CNOC) votes - these are used by the GMU but the

	 * votes are known and fixed for the target

	 */

	msg->cnoc_cmds_num = 1;

	msg->cnoc_wait_bitmask = 0x01;



	msg->cnoc_cmds_addrs[0] = 0x50058;

	msg->cnoc_cmds_data[0][0] =  0x40000000;

	msg->cnoc_cmds_data[1][0] =  0x60000001;

}



static void adreno_7c3_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)

{

	/*
@@ -646,6 +677,8 @@ static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) 
		adreno_7c3_build_bw_table(&msg);

	else if (adreno_is_a660(adreno_gpu))

		a660_build_bw_table(&msg);

	else if (adreno_is_a663(adreno_gpu))

		a663_build_bw_table(&msg);

	else if (adreno_is_a690(adreno_gpu))

		a690_build_bw_table(&msg);

	else if (adreno_is_a730(adreno_gpu))

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+5 −0
Original line number Diff line number Diff line
@@ -470,6 +470,11 @@ static inline int adreno_is_a680(const struct adreno_gpu *gpu) 
	return adreno_is_revn(gpu, 680);

}



static inline int adreno_is_a663(const struct adreno_gpu *gpu)

{

	return gpu->info->chip_ids[0] == 0x06060300;

}



static inline int adreno_is_a690(const struct adreno_gpu *gpu)

{

	return gpu->info->chip_ids[0] == 0x06090000;