Loading Documentation/x86_64/boot-options.txt +10 −17 Original line number Diff line number Diff line Loading @@ -226,9 +226,9 @@ IOMMU (input/output memory management unit) is 20. memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order. (default: order=1, i.e. 64MB) merge Do scather-gather (SG) merging. Implies "force" merge Do scatter-gather (SG) merging. Implies "force" (experimental). nomerge Don't do scather-gather (SG) merging. nomerge Don't do scatter-gather (SG) merging. noaperture Ask the IOMMU not to touch the aperture for AGP. forcesac Force single-address cycle (SAC) mode for masks <40bits (experimental). Loading Loading @@ -280,7 +280,7 @@ Debugging This will also cause panics on machine check exceptions. Useful together with panic=30 to trigger a reboot. kstack=N Print that many words from the kernel stack in oops dumps. kstack=N Print N words from the kernel stack in oops dumps. pagefaulttrace Dump all page faults. Only useful for extreme debugging and will create a lot of output. Loading @@ -292,15 +292,8 @@ Debugging newfallback: use new unwinder but fall back to old if it gets stuck (default) call_trace=[old|both|newfallback|new] old: use old inexact backtracer new: use new exact dwarf2 unwinder both: print entries from both newfallback: use new unwinder but fall back to old if it gets stuck (default) Misc Miscellaneous noreplacement Don't replace instructions with more appropriate ones for the CPU. This may be useful on asymmetric MP systems where some CPU have less capabilities than the others. where some CPUs have less capabilities than others. Documentation/x86_64/cpu-hotplug-spec +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ Firmware support for CPU hotplug under Linux/x86-64 --------------------------------------------------- Linux/x86-64 supports CPU hotplug now. For various reasons Linux wants to know in advance boot time the maximum number of CPUs that could be plugged know in advance of boot time the maximum number of CPUs that could be plugged into the system. ACPI 3.0 currently has no official way to supply this information from the firmware to the operating system. Loading Documentation/x86_64/kernel-stacks +13 −13 Original line number Diff line number Diff line Loading @@ -9,9 +9,9 @@ zombie. While the thread is in user space the kernel stack is empty except for the thread_info structure at the bottom. In addition to the per thread stacks, there are specialized stacks associated with each cpu. These stacks are only used while the kernel is in control on that cpu, when a cpu returns to user space the specialized stacks contain no useful data. The main cpu stacks is associated with each CPU. These stacks are only used while the kernel is in control on that CPU; when a CPU returns to user space the specialized stacks contain no useful data. The main CPU stacks are: * Interrupt stack. IRQSTACKSIZE Loading @@ -32,17 +32,17 @@ x86_64 also has a feature which is not available on i386, the ability to automatically switch to a new stack for designated events such as double fault or NMI, which makes it easier to handle these unusual events on x86_64. This feature is called the Interrupt Stack Table (IST). There can be up to 7 IST entries per cpu. The IST code is an index into the Task State Segment (TSS), the IST entries in the TSS point to dedicated stacks, each stack can be a different size. (IST). There can be up to 7 IST entries per CPU. The IST code is an index into the Task State Segment (TSS). The IST entries in the TSS point to dedicated stacks; each stack can be a different size. An IST is selected by an non-zero value in the IST field of an An IST is selected by a non-zero value in the IST field of an interrupt-gate descriptor. When an interrupt occurs and the hardware loads such a descriptor, the hardware automatically sets the new stack pointer based on the IST value, then invokes the interrupt handler. If software wants to allow nested IST interrupts then the handler must adjust the IST values on entry to and exit from the interrupt handler. (this is occasionally done, e.g. for debug exceptions) (This is occasionally done, e.g. for debug exceptions.) Events with different IST codes (i.e. with different stacks) can be nested. For example, a debug interrupt can safely be interrupted by an Loading @@ -58,17 +58,17 @@ The currently assigned IST stacks are :- Used for interrupt 12 - Stack Fault Exception (#SS). This allows to recover from invalid stack segments. Rarely This allows the CPU to recover from invalid stack segments. Rarely happens. * DOUBLEFAULT_STACK. EXCEPTION_STKSZ (PAGE_SIZE). Used for interrupt 8 - Double Fault Exception (#DF). Invoked when handling a exception causes another exception. Happens when the kernel is very confused (e.g. kernel stack pointer corrupt) Using a separate stack allows to recover from it well enough in many cases to still output an oops. Invoked when handling one exception causes another exception. Happens when the kernel is very confused (e.g. kernel stack pointer corrupt). Using a separate stack allows the kernel to recover from it well enough in many cases to still output an oops. * NMI_STACK. EXCEPTION_STKSZ (PAGE_SIZE). Loading Documentation/x86_64/mm.txt +11 −11 Original line number Diff line number Diff line Loading @@ -16,13 +16,13 @@ ffffffff88000000 - fffffffffff00000 (=1919MB) module mapping space The direct mapping covers all memory in the system up to the highest memory address (this means in some cases it can also include PCI memory holes) holes). vmalloc space is lazily synchronized into the different PML4 pages of the processes using the page fault handler, with init_level4_pgt as reference. Current X86-64 implementations only support 40 bit of address space, Current X86-64 implementations only support 40 bits of address space, but we support up to 46 bits. This expands into MBZ space in the page tables. -Andi Kleen, Jul 2004 Loading
Documentation/x86_64/boot-options.txt +10 −17 Original line number Diff line number Diff line Loading @@ -226,9 +226,9 @@ IOMMU (input/output memory management unit) is 20. memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order. (default: order=1, i.e. 64MB) merge Do scather-gather (SG) merging. Implies "force" merge Do scatter-gather (SG) merging. Implies "force" (experimental). nomerge Don't do scather-gather (SG) merging. nomerge Don't do scatter-gather (SG) merging. noaperture Ask the IOMMU not to touch the aperture for AGP. forcesac Force single-address cycle (SAC) mode for masks <40bits (experimental). Loading Loading @@ -280,7 +280,7 @@ Debugging This will also cause panics on machine check exceptions. Useful together with panic=30 to trigger a reboot. kstack=N Print that many words from the kernel stack in oops dumps. kstack=N Print N words from the kernel stack in oops dumps. pagefaulttrace Dump all page faults. Only useful for extreme debugging and will create a lot of output. Loading @@ -292,15 +292,8 @@ Debugging newfallback: use new unwinder but fall back to old if it gets stuck (default) call_trace=[old|both|newfallback|new] old: use old inexact backtracer new: use new exact dwarf2 unwinder both: print entries from both newfallback: use new unwinder but fall back to old if it gets stuck (default) Misc Miscellaneous noreplacement Don't replace instructions with more appropriate ones for the CPU. This may be useful on asymmetric MP systems where some CPU have less capabilities than the others. where some CPUs have less capabilities than others.
Documentation/x86_64/cpu-hotplug-spec +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ Firmware support for CPU hotplug under Linux/x86-64 --------------------------------------------------- Linux/x86-64 supports CPU hotplug now. For various reasons Linux wants to know in advance boot time the maximum number of CPUs that could be plugged know in advance of boot time the maximum number of CPUs that could be plugged into the system. ACPI 3.0 currently has no official way to supply this information from the firmware to the operating system. Loading
Documentation/x86_64/kernel-stacks +13 −13 Original line number Diff line number Diff line Loading @@ -9,9 +9,9 @@ zombie. While the thread is in user space the kernel stack is empty except for the thread_info structure at the bottom. In addition to the per thread stacks, there are specialized stacks associated with each cpu. These stacks are only used while the kernel is in control on that cpu, when a cpu returns to user space the specialized stacks contain no useful data. The main cpu stacks is associated with each CPU. These stacks are only used while the kernel is in control on that CPU; when a CPU returns to user space the specialized stacks contain no useful data. The main CPU stacks are: * Interrupt stack. IRQSTACKSIZE Loading @@ -32,17 +32,17 @@ x86_64 also has a feature which is not available on i386, the ability to automatically switch to a new stack for designated events such as double fault or NMI, which makes it easier to handle these unusual events on x86_64. This feature is called the Interrupt Stack Table (IST). There can be up to 7 IST entries per cpu. The IST code is an index into the Task State Segment (TSS), the IST entries in the TSS point to dedicated stacks, each stack can be a different size. (IST). There can be up to 7 IST entries per CPU. The IST code is an index into the Task State Segment (TSS). The IST entries in the TSS point to dedicated stacks; each stack can be a different size. An IST is selected by an non-zero value in the IST field of an An IST is selected by a non-zero value in the IST field of an interrupt-gate descriptor. When an interrupt occurs and the hardware loads such a descriptor, the hardware automatically sets the new stack pointer based on the IST value, then invokes the interrupt handler. If software wants to allow nested IST interrupts then the handler must adjust the IST values on entry to and exit from the interrupt handler. (this is occasionally done, e.g. for debug exceptions) (This is occasionally done, e.g. for debug exceptions.) Events with different IST codes (i.e. with different stacks) can be nested. For example, a debug interrupt can safely be interrupted by an Loading @@ -58,17 +58,17 @@ The currently assigned IST stacks are :- Used for interrupt 12 - Stack Fault Exception (#SS). This allows to recover from invalid stack segments. Rarely This allows the CPU to recover from invalid stack segments. Rarely happens. * DOUBLEFAULT_STACK. EXCEPTION_STKSZ (PAGE_SIZE). Used for interrupt 8 - Double Fault Exception (#DF). Invoked when handling a exception causes another exception. Happens when the kernel is very confused (e.g. kernel stack pointer corrupt) Using a separate stack allows to recover from it well enough in many cases to still output an oops. Invoked when handling one exception causes another exception. Happens when the kernel is very confused (e.g. kernel stack pointer corrupt). Using a separate stack allows the kernel to recover from it well enough in many cases to still output an oops. * NMI_STACK. EXCEPTION_STKSZ (PAGE_SIZE). Loading
Documentation/x86_64/mm.txt +11 −11 Original line number Diff line number Diff line Loading @@ -16,13 +16,13 @@ ffffffff88000000 - fffffffffff00000 (=1919MB) module mapping space The direct mapping covers all memory in the system up to the highest memory address (this means in some cases it can also include PCI memory holes) holes). vmalloc space is lazily synchronized into the different PML4 pages of the processes using the page fault handler, with init_level4_pgt as reference. Current X86-64 implementations only support 40 bit of address space, Current X86-64 implementations only support 40 bits of address space, but we support up to 46 bits. This expands into MBZ space in the page tables. -Andi Kleen, Jul 2004