Commit 57f3d896 authored by Ankan Biswas's avatar Ankan Biswas Committed by Andrew Morton
Browse files

lib/xz: remove dead IA-64 (Itanium) support code 

Support for the IA-64 (Itanium) architecture was removed in commit
cf8e8658 ("arch: Remove Itanium (IA-64) architecture").

This patch drops the IA-64 specific decompression code from lib/xz, which
was conditionally compiled with the now-obsolete CONFIG_XZ_DEC_IA64
option.

Link: https://lkml.kernel.org/r/20251014052738.31185-1-spyjetfayed@gmail.com


Signed-off-by: default avatarAnkan Biswas <spyjetfayed@gmail.com>
Reviewed-by: default avatarKuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: default avatarKhalid Aziz <khalid@kernel.org>
Acked-by: default avatarLasse Collin <lasse.collin@tukaani.org>
Cc: David Hunter <david.hunter.linux@gmail.com>
Cc: Shuah Khan <skhan@linuxfoundation.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 9544f9e6

lib/xz/xz_dec_bcj.c

+0 −95
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ struct xz_dec_bcj { 
	enum {

		BCJ_X86 = 4,        /* x86 or x86-64 */

		BCJ_POWERPC = 5,    /* Big endian only */

		BCJ_IA64 = 6,       /* Big or little endian */

		BCJ_ARM = 7,        /* Little endian only */

		BCJ_ARMTHUMB = 8,   /* Little endian only */

		BCJ_SPARC = 9,      /* Big or little endian */
@@ -180,92 +179,6 @@ static size_t bcj_powerpc(struct xz_dec_bcj *s, uint8_t *buf, size_t size) 
}

#endif



#ifdef XZ_DEC_IA64

static size_t bcj_ia64(struct xz_dec_bcj *s, uint8_t *buf, size_t size)

{

	static const uint8_t branch_table[32] = {

		0, 0, 0, 0, 0, 0, 0, 0,

		0, 0, 0, 0, 0, 0, 0, 0,

		4, 4, 6, 6, 0, 0, 7, 7,

		4, 4, 0, 0, 4, 4, 0, 0

	};



	/*

	 * The local variables take a little bit stack space, but it's less

	 * than what LZMA2 decoder takes, so it doesn't make sense to reduce

	 * stack usage here without doing that for the LZMA2 decoder too.

	 */



	/* Loop counters */

	size_t i;

	size_t j;



	/* Instruction slot (0, 1, or 2) in the 128-bit instruction word */

	uint32_t slot;



	/* Bitwise offset of the instruction indicated by slot */

	uint32_t bit_pos;



	/* bit_pos split into byte and bit parts */

	uint32_t byte_pos;

	uint32_t bit_res;



	/* Address part of an instruction */

	uint32_t addr;



	/* Mask used to detect which instructions to convert */

	uint32_t mask;



	/* 41-bit instruction stored somewhere in the lowest 48 bits */

	uint64_t instr;



	/* Instruction normalized with bit_res for easier manipulation */

	uint64_t norm;



	size &= ~(size_t)15;



	for (i = 0; i < size; i += 16) {

		mask = branch_table[buf[i] & 0x1F];

		for (slot = 0, bit_pos = 5; slot < 3; ++slot, bit_pos += 41) {

			if (((mask >> slot) & 1) == 0)

				continue;



			byte_pos = bit_pos >> 3;

			bit_res = bit_pos & 7;

			instr = 0;

			for (j = 0; j < 6; ++j)

				instr |= (uint64_t)(buf[i + j + byte_pos])

						<< (8 * j);



			norm = instr >> bit_res;



			if (((norm >> 37) & 0x0F) == 0x05

					&& ((norm >> 9) & 0x07) == 0) {

				addr = (norm >> 13) & 0x0FFFFF;

				addr |= ((uint32_t)(norm >> 36) & 1) << 20;

				addr <<= 4;

				addr -= s->pos + (uint32_t)i;

				addr >>= 4;



				norm &= ~((uint64_t)0x8FFFFF << 13);

				norm |= (uint64_t)(addr & 0x0FFFFF) << 13;

				norm |= (uint64_t)(addr & 0x100000)

						<< (36 - 20);



				instr &= (1 << bit_res) - 1;

				instr |= norm << bit_res;



				for (j = 0; j < 6; j++)

					buf[i + j + byte_pos]

						= (uint8_t)(instr >> (8 * j));

			}

		}

	}



	return i;

}

#endif



#ifdef XZ_DEC_ARM

static size_t bcj_arm(struct xz_dec_bcj *s, uint8_t *buf, size_t size)

{
@@ -509,11 +422,6 @@ static void bcj_apply(struct xz_dec_bcj *s, 
		filtered = bcj_powerpc(s, buf, size);

		break;

#endif

#ifdef XZ_DEC_IA64

	case BCJ_IA64:

		filtered = bcj_ia64(s, buf, size);

		break;

#endif

#ifdef XZ_DEC_ARM

	case BCJ_ARM:

		filtered = bcj_arm(s, buf, size);
@@ -699,9 +607,6 @@ enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint8_t id) 
#ifdef XZ_DEC_POWERPC

	case BCJ_POWERPC:

#endif

#ifdef XZ_DEC_IA64

	case BCJ_IA64:

#endif

#ifdef XZ_DEC_ARM

	case BCJ_ARM:

#endif

lib/xz/xz_private.h

+0 −4
Original line number Diff line number Diff line
@@ -24,9 +24,6 @@ 
#		ifdef CONFIG_XZ_DEC_POWERPC

#			define XZ_DEC_POWERPC

#		endif

#		ifdef CONFIG_XZ_DEC_IA64

#			define XZ_DEC_IA64

#		endif

#		ifdef CONFIG_XZ_DEC_ARM

#			define XZ_DEC_ARM

#		endif
@@ -103,7 +100,6 @@ 
 */

#ifndef XZ_DEC_BCJ

#	if defined(XZ_DEC_X86) || defined(XZ_DEC_POWERPC) \

			|| defined(XZ_DEC_IA64) \

			|| defined(XZ_DEC_ARM) || defined(XZ_DEC_ARMTHUMB) \

			|| defined(XZ_DEC_SPARC) || defined(XZ_DEC_ARM64) \

			|| defined(XZ_DEC_RISCV)