Commit 58627b72 authored by Marc Zyngier's avatar Marc Zyngier Committed by Oliver Upton
Browse files

KVM: arm64: Make PIR{,E0}_EL1 UNDEF if S1PIE is not advertised to the guest 



As part of the ongoing effort to honor the guest configuration,
add the necessary checks to make PIR_EL1 and co UNDEF if not
advertised to the guest, and avoid context switching them.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Reviewed-by: default avatarJoey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20240214131827.2856277-23-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
parent 8ecdccb9

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

+21 −3
Original line number Diff line number Diff line
@@ -27,16 +27,34 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) 
	ctxt_sys_reg(ctxt, TPIDRRO_EL0)	= read_sysreg(tpidrro_el0);

}



static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt)

static inline struct kvm_vcpu *ctxt_to_vcpu(struct kvm_cpu_context *ctxt)

{

	struct kvm_vcpu *vcpu = ctxt->__hyp_running_vcpu;



	if (!vcpu)

		vcpu = container_of(ctxt, struct kvm_vcpu, arch.ctxt);



	return vcpu;

}



static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt)

{

	struct kvm_vcpu *vcpu = ctxt_to_vcpu(ctxt);



	return kvm_has_mte(kern_hyp_va(vcpu->kvm));

}



static inline bool ctxt_has_s1pie(struct kvm_cpu_context *ctxt)

{

	struct kvm_vcpu *vcpu;



	if (!cpus_have_final_cap(ARM64_HAS_S1PIE))

		return false;



	vcpu = ctxt_to_vcpu(ctxt);

	return kvm_has_feat(kern_hyp_va(vcpu->kvm), ID_AA64MMFR3_EL1, S1PIE, IMP);

}



static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)

{

	ctxt_sys_reg(ctxt, SCTLR_EL1)	= read_sysreg_el1(SYS_SCTLR);
@@ -55,7 +73,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) 
	ctxt_sys_reg(ctxt, CONTEXTIDR_EL1) = read_sysreg_el1(SYS_CONTEXTIDR);

	ctxt_sys_reg(ctxt, AMAIR_EL1)	= read_sysreg_el1(SYS_AMAIR);

	ctxt_sys_reg(ctxt, CNTKCTL_EL1)	= read_sysreg_el1(SYS_CNTKCTL);

	if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {

	if (ctxt_has_s1pie(ctxt)) {

		ctxt_sys_reg(ctxt, PIR_EL1)	= read_sysreg_el1(SYS_PIR);

		ctxt_sys_reg(ctxt, PIRE0_EL1)	= read_sysreg_el1(SYS_PIRE0);

	}
@@ -131,7 +149,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) 
	write_sysreg_el1(ctxt_sys_reg(ctxt, CONTEXTIDR_EL1), SYS_CONTEXTIDR);

	write_sysreg_el1(ctxt_sys_reg(ctxt, AMAIR_EL1),	SYS_AMAIR);

	write_sysreg_el1(ctxt_sys_reg(ctxt, CNTKCTL_EL1), SYS_CNTKCTL);

	if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {

	if (ctxt_has_s1pie(ctxt)) {

		write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1),	SYS_PIR);

		write_sysreg_el1(ctxt_sys_reg(ctxt, PIRE0_EL1),	SYS_PIRE0);

	}

arch/arm64/kvm/sys_regs.c

+4 −0
Original line number Diff line number Diff line
@@ -3994,6 +3994,10 @@ void kvm_init_sysreg(struct kvm_vcpu *vcpu) 
						HFGITR_EL2_TLBIRVAAE1OS	|

						HFGITR_EL2_TLBIRVAE1OS);



	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1PIE, IMP))

		kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPIRE0_EL1 |

						HFGxTR_EL2_nPIR_EL1);



	set_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &kvm->arch.flags);

out:

	mutex_unlock(&kvm->arch.config_lock);