Commit 5897c174 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/field-get' 

- Use FIELD_GET()/FIELD_PREP() when possible throughout drivers/pci/ (Ilpo
  Järvinen, Bjorn Helgaas)

- Rework DPC control programming for clarity (Ilpo Järvinen)

* pci/field-get:
  PCI/portdrv: Use FIELD_GET()
  PCI/VC: Use FIELD_GET()
  PCI/PTM: Use FIELD_GET()
  PCI/PME: Use FIELD_GET()
  PCI/ATS: Use FIELD_GET()
  PCI/ATS: Show PASID Capability register width in bitmasks
  PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk
  PCI: Use FIELD_GET()
  PCI/MSI: Use FIELD_GET/PREP()
  PCI/DPC: Use defines with DPC reason fields
  PCI/DPC: Use defined fields with DPC_CTL register
  PCI/DPC: Use FIELD_GET()
  PCI: hotplug: Use FIELD_GET/PREP()
  PCI: dwc: Use FIELD_GET/PREP()
  PCI: cadence: Use FIELD_GET()
  PCI: Use FIELD_GET() to extract Link Width
  PCI: mvebu: Use FIELD_PREP() with Link Width
  PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields

# Conflicts:
#	drivers/pci/controller/dwc/pcie-tegra194.c
parents 65de3fd8 8a039557

drivers/pci/ats.c

+2 −5
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
 * Copyright (C) 2011 Advanced Micro Devices,

 */



#include <linux/bitfield.h>

#include <linux/export.h>

#include <linux/pci-ats.h>

#include <linux/pci.h>
@@ -480,8 +481,6 @@ int pci_pasid_features(struct pci_dev *pdev) 
}

EXPORT_SYMBOL_GPL(pci_pasid_features);



#define PASID_NUMBER_SHIFT	8

#define PASID_NUMBER_MASK	(0x1f << PASID_NUMBER_SHIFT)

/**

 * pci_max_pasids - Get maximum number of PASIDs supported by device

 * @pdev: PCI device structure
@@ -503,9 +502,7 @@ int pci_max_pasids(struct pci_dev *pdev) 


	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);



	supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;



	return (1 << supported);

	return (1 << FIELD_GET(PCI_PASID_CAP_WIDTH, supported));

}

EXPORT_SYMBOL_GPL(pci_max_pasids);

#endif /* CONFIG_PCI_PASID */

drivers/pci/controller/cadence/pcie-cadence-ep.c

+5 −4
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
// Cadence PCIe endpoint controller driver.

// Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>



#include <linux/bitfield.h>

#include <linux/delay.h>

#include <linux/kernel.h>

#include <linux/of.h>
@@ -262,7 +263,7 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn) 
	 * Get the Multiple Message Enable bitfield from the Message Control

	 * register.

	 */

	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;

	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);



	return mme;

}
@@ -394,7 +395,7 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn, 
		return -EINVAL;



	/* Get the number of enabled MSIs */

	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;

	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);

	msi_count = 1 << mme;

	if (!interrupt_num || interrupt_num > msi_count)

		return -EINVAL;
@@ -449,7 +450,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn, 
		return -EINVAL;



	/* Get the number of enabled MSIs */

	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;

	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);

	msi_count = 1 << mme;

	if (!interrupt_num || interrupt_num > msi_count)

		return -EINVAL;
@@ -506,7 +507,7 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn, 


	reg = cap + PCI_MSIX_TABLE;

	tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg);

	bir = tbl_offset & PCI_MSIX_TABLE_BIR;

	bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);

	tbl_offset &= PCI_MSIX_TABLE_OFFSET;



	msix_tbl = epf->epf_bar[bir]->addr + tbl_offset;

drivers/pci/controller/dwc/pcie-designware-ep.c

+4 −3
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 * Author: Kishon Vijay Abraham I <kishon@ti.com>

 */



#include <linux/bitfield.h>

#include <linux/of.h>

#include <linux/platform_device.h>
@@ -350,7 +351,7 @@ static int dw_pcie_ep_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no) 
	if (!(val & PCI_MSI_FLAGS_ENABLE))

		return -EINVAL;



	val = (val & PCI_MSI_FLAGS_QSIZE) >> 4;

	val = FIELD_GET(PCI_MSI_FLAGS_QSIZE, val);



	return val;

}
@@ -373,7 +374,7 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no, 
	reg = ep_func->msi_cap + func_offset + PCI_MSI_FLAGS;

	val = dw_pcie_readw_dbi(pci, reg);

	val &= ~PCI_MSI_FLAGS_QMASK;

	val |= (interrupts << 1) & PCI_MSI_FLAGS_QMASK;

	val |= FIELD_PREP(PCI_MSI_FLAGS_QMASK, interrupts);

	dw_pcie_dbi_ro_wr_en(pci);

	dw_pcie_writew_dbi(pci, reg, val);

	dw_pcie_dbi_ro_wr_dis(pci);
@@ -600,7 +601,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, 


	reg = ep_func->msix_cap + func_offset + PCI_MSIX_TABLE;

	tbl_offset = dw_pcie_readl_dbi(pci, reg);

	bir = (tbl_offset & PCI_MSIX_TABLE_BIR);

	bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);

	tbl_offset &= PCI_MSIX_TABLE_OFFSET;



	msix_tbl = ep->epf_bar[bir]->addr + tbl_offset;

drivers/pci/controller/dwc/pcie-tegra194.c

+10 −7
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
 * Author: Vidya Sagar <vidyas@nvidia.com>

 */



#include <linux/bitfield.h>

#include <linux/clk.h>

#include <linux/debugfs.h>

#include <linux/delay.h>
@@ -125,7 +126,7 @@ 


#define APPL_LTR_MSG_1				0xC4

#define LTR_MSG_REQ				BIT(15)

#define LTR_MST_NO_SNOOP_SHIFT			16

#define LTR_NOSNOOP_MSG_REQ			BIT(31)



#define APPL_LTR_MSG_2				0xC8

#define APPL_LTR_MSG_2_LTR_MSG_REQ_STATE	BIT(3)
@@ -346,8 +347,7 @@ static void apply_bad_link_workaround(struct dw_pcie_rp *pp) 
	 */

	val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA);

	if (val & PCI_EXP_LNKSTA_LBMS) {

		current_link_width = (val & PCI_EXP_LNKSTA_NLW) >>

				     PCI_EXP_LNKSTA_NLW_SHIFT;

		current_link_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, val);

		if (pcie->init_link_width > current_link_width) {

			dev_warn(pci->dev, "PCIe link is bad, width reduced\n");

			val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
@@ -496,8 +496,12 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg) 
		ktime_t timeout;



		/* 110us for both snoop and no-snoop */

		val = 110 | (2 << PCI_LTR_SCALE_SHIFT) | LTR_MSG_REQ;

		val |= (val << LTR_MST_NO_SNOOP_SHIFT);

		val = FIELD_PREP(PCI_LTR_VALUE_MASK, 110) |

		      FIELD_PREP(PCI_LTR_SCALE_MASK, 2) |

		      LTR_MSG_REQ |

		      FIELD_PREP(PCI_LTR_NOSNOOP_VALUE, 110) |

		      FIELD_PREP(PCI_LTR_NOSNOOP_SCALE, 2) |

		      LTR_NOSNOOP_MSG_REQ;

		appl_writel(pcie, val, APPL_LTR_MSG_1);



		/* Send LTR upstream */
@@ -760,8 +764,7 @@ static void tegra_pcie_enable_system_interrupts(struct dw_pcie_rp *pp) 


	val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +

				  PCI_EXP_LNKSTA);

	pcie->init_link_width = (val_w & PCI_EXP_LNKSTA_NLW) >>

				PCI_EXP_LNKSTA_NLW_SHIFT;

	pcie->init_link_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, val_w);



	val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +

				  PCI_EXP_LNKCTL);

drivers/pci/controller/pci-mvebu.c

+1 −1
Original line number Diff line number Diff line
@@ -264,7 +264,7 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) 
	 */

	lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);

	lnkcap &= ~PCI_EXP_LNKCAP_MLW;

	lnkcap |= (port->is_x4 ? 4 : 1) << 4;

	lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1);

	mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);



	/* Disable Root Bridge I/O space, memory space and bus mastering. */