Commit 58a9ae63 authored by Adrian Hunter's avatar Adrian Hunter Committed by Alexandre Belloni
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i3c: mipi-i3c-hci-pci: Rename some Intel-related identifiers



Rename some Intel-related identifiers to ensure Intel-related identifiers
begin "intel_" or INTEL_, and for brevity removing purposeless "PRIV" in
preparation to add more register definitions.

Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251128064038.55158-4-adrian.hunter@intel.com


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent f4fe6e70
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+9 −9
Original line number Diff line number Diff line
@@ -21,11 +21,11 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida);

#define INTEL_PRIV_OFFSET		0x2b0
#define INTEL_PRIV_SIZE			0x28
#define INTEL_PRIV_RESETS		0x04
#define INTEL_PRIV_RESETS_RESET		BIT(0)
#define INTEL_PRIV_RESETS_RESET_DONE	BIT(1)
#define INTEL_RESETS			0x04
#define INTEL_RESETS_RESET		BIT(0)
#define INTEL_RESETS_RESET_DONE		BIT(1)

static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci)
static int intel_i3c_init(struct pci_dev *pci)
{
	unsigned long timeout;
	void __iomem *priv;
@@ -39,21 +39,21 @@ static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci)
	dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64));

	/* Assert reset, wait for completion and release reset */
	writel(0, priv + INTEL_PRIV_RESETS);
	writel(0, priv + INTEL_RESETS);
	timeout = jiffies + msecs_to_jiffies(10);
	while (!(readl(priv + INTEL_PRIV_RESETS) &
		 INTEL_PRIV_RESETS_RESET_DONE)) {
	while (!(readl(priv + INTEL_RESETS) &
		 INTEL_RESETS_RESET_DONE)) {
		if (time_after(jiffies, timeout))
			break;
		cpu_relax();
	}
	writel(INTEL_PRIV_RESETS_RESET, priv + INTEL_PRIV_RESETS);
	writel(INTEL_RESETS_RESET, priv + INTEL_RESETS);

	return 0;
}

static struct mipi_i3c_hci_pci_info intel_info = {
	.init = mipi_i3c_hci_pci_intel_init,
	.init = intel_i3c_init,
};

static int mipi_i3c_hci_pci_probe(struct pci_dev *pci,