Unverified Commit 5921ae27 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next 

* clk-aspeed:
  clk: aspeed: Add reset for HACE/VIDEO
  dt-bindings: clock: aspeed: Add VIDEO reset definition
  clk: aspeed: add AST2700 clock driver
  MAINTAINERS: Add entry for ASPEED clock drivers.
  clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.

* clk-qcom: (49 commits)
  clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc
  clk: qcom: gfx3d: add parent to parent request map
  clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src
  clk: qcom: dispcc-sdm845: Enable parents for pixel clocks
  clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate()
  clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate()
  clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate()
  clk: qcom: Add support for GPUCC and GXCLK for Kaanapali
  clk: qcom: Add support for VideoCC driver for Kaanapali
  clk: qcom: camcc: Add support for camera clock controller for Kaanapali
  clk: qcom: dispcc: Add support for display clock controller Kaanapali
  clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL
  clk: qcom: clk-alpha-pll: Update the PLL support for cal_l
  clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC
  clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL
  dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller
  dt-bindings: clock: qcom: Add Kaanapali video clock controller
  dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali
  dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller
  dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC
  ...
parents a612d3d6 5f35b48a 7fbabe8f

Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml

+4 −2
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller on MSM8953

title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439



maintainers:

  - Adam Skladowski <a_skl39@protonmail.com>
@@ -13,7 +13,7 @@ maintainers: 


description: |

  Qualcomm global clock control module provides the clocks, resets and power

  domains on MSM8937 or MSM8953.

  domains on MSM8937, MSM8940, MSM8953 or SDM439.



  See also::

    include/dt-bindings/clock/qcom,gcc-msm8917.h
@@ -23,7 +23,9 @@ properties: 
  compatible:

    enum:

      - qcom,gcc-msm8937

      - qcom,gcc-msm8940

      - qcom,gcc-msm8953

      - qcom,gcc-sdm439



  clocks:

    items:

Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml

0 → 100644
+63 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,kaanapali-gxclkctl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Graphics power domain Controller on Kaanapali



maintainers:

  - Taniya Das <taniya.das@oss.qualcomm.com>



description: |

  Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and

  Power domains (GDSC). This module provides the power domains control

  of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem.



  See also:

    include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h



properties:

  compatible:

    enum:

      - qcom,kaanapali-gxclkctl



  power-domains:

    description:

      Power domains required for the clock controller to operate

    items:

      - description: GFX power domain

      - description: GMXC power domain

      - description: GPUCC(CX) power domain



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - power-domains

  - '#power-domain-cells'



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/power/qcom,rpmhpd.h>

    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        clock-controller@3d64000 {

            compatible = "qcom,kaanapali-gxclkctl";

            reg = <0x0 0x03d64000 0x0 0x6000>;

            power-domains = <&rpmhpd RPMHPD_GFX>,

                            <&rpmhpd RPMHPD_GMXC>,

                            <&gpucc 0>;

            #power-domain-cells = <1>;

        };

    };

...

Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml

+11 −0
Original line number Diff line number Diff line
@@ -9,23 +9,32 @@ title: Qualcomm Camera Clock & Reset Controller on SM8450 
maintainers:

  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

  - Jagadeesh Kona <quic_jkona@quicinc.com>

  - Taniya Das <taniya.das@oss.qualcomm.com>



description: |

  Qualcomm camera clock control module provides the clocks, resets and power

  domains on SM8450.



  See also:

    include/dt-bindings/clock/qcom,kaanapali-camcc.h

    include/dt-bindings/clock/qcom,kaanapali-cambistmclkcc.h

    include/dt-bindings/clock/qcom,sm8450-camcc.h

    include/dt-bindings/clock/qcom,sm8550-camcc.h

    include/dt-bindings/clock/qcom,sm8650-camcc.h

    include/dt-bindings/clock/qcom,sm8750-cambistmclkcc.h

    include/dt-bindings/clock/qcom,sm8750-camcc.h



properties:

  compatible:

    enum:

      - qcom,kaanapali-cambistmclkcc

      - qcom,kaanapali-camcc

      - qcom,sm8450-camcc

      - qcom,sm8475-camcc

      - qcom,sm8550-camcc

      - qcom,sm8650-camcc

      - qcom,sm8750-cambistmclkcc

      - qcom,sm8750-camcc



  clocks:

    items:
@@ -63,6 +72,8 @@ allOf: 
        compatible:

          contains:

            enum:

              - qcom,kaanapali-cambistmclkcc

              - qcom,kaanapali-camcc

              - qcom,sc8280xp-camcc

              - qcom,sm8450-camcc

              - qcom,sm8550-camcc

Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

+2 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ description: | 
  domains on Qualcomm SoCs.



  See also::

    include/dt-bindings/clock/qcom,kaanapali-gpucc.h

    include/dt-bindings/clock/qcom,milos-gpucc.h

    include/dt-bindings/clock/qcom,sar2130p-gpucc.h

    include/dt-bindings/clock/qcom,sm4450-gpucc.h
@@ -26,6 +27,7 @@ description: | 
properties:

  compatible:

    enum:

      - qcom,kaanapali-gpucc

      - qcom,milos-gpucc

      - qcom,sar2130p-gpucc

      - qcom,sm4450-gpucc

Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml

+3 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ description: | 
  domains on SM8450.



  See also:

    include/dt-bindings/clock/qcom,kaanapali-videocc.h

    include/dt-bindings/clock/qcom,sm8450-videocc.h

    include/dt-bindings/clock/qcom,sm8650-videocc.h

    include/dt-bindings/clock/qcom,sm8750-videocc.h
@@ -22,6 +23,7 @@ description: | 
properties:

  compatible:

    enum:

      - qcom,kaanapali-videocc

      - qcom,sm8450-videocc

      - qcom,sm8475-videocc

      - qcom,sm8550-videocc
@@ -61,6 +63,7 @@ allOf: 
        compatible:

          contains:

            enum:

              - qcom,kaanapali-videocc

              - qcom,sm8450-videocc

              - qcom,sm8550-videocc

              - qcom,sm8750-videocc